zl50075 Zarlink Semiconductor, zl50075 Datasheet - Page 19

• Manufacturer Part Number: zl50075
• Description: 32 K Channel Digital Switch With High Jitter Tolerance, Rate Conversion Per Group Of 2 Streams 8, 16, 32 Or 64 Mbps , And 64 Inputs And 64 Outputs
• Manufacturer: Zarlink Semiconductor

This programming feature is provided to assist in designs where per stream routing delays are significant and
different.
The OSBA bits in the Group Control Registers are used to set the bit-advancement for each of the corresponding
serial output stream groups. Figure 5 illustrates the effect of the OSBA settings on the output timing.
There are limitations when the ZL50075 is programmed to use CKi0 as the output stream clock source:
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6.0
In Message Mode (MSG), microprocessor data can be broadcast to the output data streams on a per-channel
basis. This feature is useful for transferring control and status information to external circuits or other TDM devices.
For a given output channel, when the corresponding Per Channel Function (bits 31 - 29) in the Connection Memory
are set to Message Mode (010), the Connection Memory’s lowest data byte (bits 7 - 0) is output in the timeslot.
Refer to Section 14.1.1, Connection Memory Bit Functions, for programming details
If the selected reference clock frequency is 65 MHz or 32 MHz, the granularity of the advancement is
reduced to 1/2 the clock period
If the selected reference clock frequency is 16 MHz or 8 MHz, bit advancement is not available and the
output streams are driven at the nominal times
Message Mode
Nominal 8 MHz
Clock
Nominal 16 MHz
Clock
Nominal 32/65 MHz
Clock
Nominal Output
Bit Timing
Level 1
Advance
Level 2
Advance
Level 3
Advance
OSBA = 00
OSBA = 01
OSBA = 10
OSBA = 11
Figure 5 - Output Bit Advancement Timing
Zarlink Semiconductor Inc.
ZL50075
19
7.6ns (~3.8 ns at 65 Mbps)
15.2ns (~7.6 ns at 65 Mbps)
22.8ns (~11.4 ns at 65 Mbps)
Data Sheet