zl50075 Zarlink Semiconductor, zl50075 Datasheet - Page 18

• Manufacturer Part Number: zl50075
• Description: 32 K Channel Digital Switch With High Jitter Tolerance, Rate Conversion Per Group Of 2 Streams 8, 16, 32 Or 64 Mbps , And 64 Inputs And 64 Outputs
• Manufacturer: Zarlink Semiconductor

There are limitations when the ZL50075 is programmed to use CKi0 as the input stream clock source as opposed
to the internal clock:
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•
5.2
See Section 14.4, Group Control Registers, for programming details.
This feature is used to advance the output data with respect to the output frame boundary. Each group has its own
bit advancement value which can be programmed in the Group Control Registers 0 - 31 (GCR0 - 31).
By default all output streams have zero bit advancement such that bit 7 is the first bit that appears after the output
frame boundary (assuming ST-BUS formatting). The output advancement is enabled by the Output Stream Bit
Advancement (bits 21 - 20) of the Group Control Registers 0 - 31 (GCR0 - 31), as described in Section 14.4. The
output delay can vary from 0 to 22.8 ns with a 7.6 ns increment. The exception to this is output streams
programmed at 65 Mbps, in which case the increment is 3.8 ns with a total advancement of 11.4 ns.
The granularity of the delay becomes 1/2 the selected reference clock period, or 1/4 bit, whichever is longer
If the selected reference clock frequency is the same as the stream bit rate, the granularity of the delay is 1/2 bit.
In this case, the least significant bit of the ISPD register is not used; the remaining 4 bits select the total delay in
1/2 bit increments, to a maximum of 7 1/2 bits. Also, the 0 bit delay reference point changes from the 3/4 bit
position to the 1/2 bit position.
STi[n]
Fractional Bit Advancement on Output
Example: With a setting of 01111 the sampling point for bit 7 will be 3 1/2 bits
01100
00000 (Default)
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01101
01110
01111
0
Nominal Channel n Boundary
7
Figure 4 - Input Sampling Point Delay Programming
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Zarlink Semiconductor Inc.
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ZL50075
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Nominal Channel n+1 Boundary
3
2
1
0
7
6
Data Sheet
11110
11101
11100
11011
11010
11001
11000
10111
10110
10101
10100
10011
10010
10001
10000
11111