r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 998
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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19. Display Unit (DU)
19.6
When executing the power-down sequence by the following modes or functions, turn off the
display in advance.
1. Sleep mode
2. Deep sleep mode
3. Module standby
4. Change of frequency
5. Manual reset
Even when the display unit (DU) enters the power-down sequence, the register values are retained.
During a power-down sequence, do not access the display unit (DU).
19.6.1
1. Display is turned off by setting both the DEN and DRES bits in DSYSR to 0.
2. Use the VBK bit in DSSR to confirm the next VBK flag (because the display is turned off with
3. The display unit (DU) displays the data in DOOR before the display is turned off.
4. Execute the power-down sequence.
5. Display unit (DU) is turned off.
19.6.2
1. Reset the power-down sequence and start the clock.
2. Make settings to turn the display on, with the DEN and DRES bits in DSYSR set to 1 and 0
Rev.1.00 Jan. 10, 2008 Page 968 of 1658
REJ09B0261-0100
the timing of VBK).
respectively.
Power-Down Sequence
Procedures before Executing the Power-Down Sequence
Resetting the Power-Down Sequence
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