r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 893
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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Bit
4
3 to 1
0
Bit Name
ABRE
⎯
DSAE
0
Initial
Value
All 0
0
R/W
R/W
R
R/W
Internal
Update
None
⎯
None
Alpha Blend Ratio Enable
Description
0: The 31 to 24 bits in the color palette registers
1: The 31 to 24 bits in the color palette registers
•
•
For the alpha blend ratio, refer to section 19.4.9,
Superpositioning of Planes.
Reserved
These bits are always read as undefined. The
write value should always be 0.
Display Area Start Address Enable
0: The 28 to 4 bits in the plane n display area
1: The 31 to 4 bits PnDSA0R and PnDSA1R are
1 to 4 and the PnBRSL bits in the plane n
blend ratio registers (PnALPHAR) are
disabled.
The alpha blend ratio is set only by the
PnALPHA bits PnALPHAR.
1 to 4 and the PnBRSL bits in PnALPHAR are
enabled.
start address 0 and 1 registers (PnDSA0R
and PnDSA1R) are enabled.
The 31 to 29 bits are B'000.
enabled.
The following can be selected as the alpha
blend ratio. Selection is performed using the
PnBRSL bits in PnALPHAR.
PnALPHA bits in PnALPHAR
⎯ The 31 to 24 bits in the color palette
⎯ Alpha plane data (display data)
registers 1 to 4
Rev.1.00 Jan. 10, 2008 Page 863 of 1658
19. Display Unit (DU)
REJ09B0261-0100
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