r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 440
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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11. Local Bus State Controller (LBSC)
(3)
Read-Strobe/Write-Strobe Timing
When the SRAM interface is used, the strobe signal negation timing in reading can be specified
with the RDSPL bit in CSnBCR. For details of settings, see section 11.4.3, CSn Bus Control
Register (CSnBCR). The RDSPL bit should be cleared to 0 when a byte control SRAM is
specified.
Rev.1.00 Jan. 10, 2008 Page 410 of 1658
REJ09B0261-0100
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