r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1448
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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28. General Purpose I/O Ports (GPIO)
28.2.17 Port A Data Register (PADR)
PADR is an 8-bit readable/writable register that stores port A data.
Note:
Rev.1.00 Jan. 10, 2008 Page 1418 of 1658
REJ09B0261-0100
Bit
7
6
5
4
3
2
1
0
*
Bit Name
PA7DT
PA6DT
PA5DT
PA4DT
PA3DT
PA2DT
PA1DT
PA0DT
When the bus mode is set to DU via the bus mode pins (MODE11 and MODE12), the
pin is initially used as a general-purpose input, and the pin status is read from this
register.
Initial value:
Initial
Value
0*
0*
0*
0*
0*
0*
0*
0*
R/W:
Bit:
PA7DT
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7
0
PA6DT
R/W
6
0
Description
These bits store output data of a pin which is used as a
general-purpose output port. When the pin functions as
a general-purpose output port, reading the port will read
out the value of the corresponding bit of this register.
When the pin functions as a general-purpose input port,
reading the port will read out the status of the
corresponding pin.
PA5DT
R/W
5
0
PA4DT
R/W
4
0
PA3DT
R/W
3
0
PA2DT
R/W
2
0
PA1DT
R/W
1
0
PA0DT
R/W
0
0
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