r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1102
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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21. Serial Communication Interface with FIFO (SCIF)
Clocked Synchronous Mode
• Data length: Fixed at 8 bits
• LSB first for data transmission and reception
• Detection of overrun errors during reception
• Choice of peripheral clock (Pck) or SCIF_SCK pin input as SCIF clock source
Table 21.4 SCSMR Settings for Serial Transfer Format Selection
Legend:
x: Don't care
Rev.1.00 Jan. 10, 2008 Page 1072 of 1658
REJ09B0261-0100
Bit 7:
C/A
0
1
When peripheral clock (Pck) is selected: The SCIF operates on the baud rate generator clock
and a serial clock is output to external devices.
When SCIF_SCK pin input is selected: The on-chip baud rate generator is not used and the
SCIF operates on the input serial clock.
Bit 6:
CHR
0
1
x
SCSMR Settings
Bit 5:
PE
0
1
0
1
x
Bit 3:
STOP
0
1
0
1
0
1
0
1
x
Mode
Asynchronous mode
Clocked synchronous
mode
Data
Length
8-bit data
7-bit data
8-bit data
SCIF Transfer Format
Parity
Bit
No
Yes
No
Yes
No
Stop Bit
Length
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
1 bit
2 bits
No
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