r8a77850anbg Renesas Electronics Corporation., r8a77850anbg Datasheet - Page 1503
r8a77850anbg
Manufacturer Part Number
r8a77850anbg
Description
Renesas 32-bit Risc Microcomputer Superh? Risc Engine Family
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R8A77850ANBG.pdf
(1692 pages)
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29.3
29.3.1
"Instruction fetch" refers to an access in which an instruction is fetched. For example, fetching the
instruction located at the branch destination after executing a branch instruction is an instruction
access. "Operand access" refers to any memory access accompanying execution of an instruction.
For example, accessing an address (PC + disp × 2 + 4) in the instruction MOV.W@(disp,PC),Rn
is an operand access. "Data" is used in contrast to "address".
All types of operand access are classified into read or write access. Special care must be taken in
using the following instructions.
• PREF, OCBP, and OCBWB: Instructions for a read access
• MOVCA.L and OCBI: Instructions for a write access
• TAS.B: Instruction for a single read access or a single write access
The operand access accompanying the PREF, OCBP, OCBWB, and OCBI instructions is access
without the data value; therefore, do not include the data value in the match conditions for these
instructions.
The operand size should be defined for all types of operand access. Available operand sizes are
byte, word, longword, and quadword. For operand access accompanying the PREF, OCBP,
OCBWB, MOVCA.L, and OCBI instructions, the operand size is defined as longword.
Operation Description
Definition of Words Related to Accesses
Rev.1.00 Jan. 10, 2008 Page 1473 of 1658
29. User Break Controller (UBC)
REJ09B0261-0100
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