mcimx27- Freescale Semiconductor, Inc, mcimx27- Datasheet - Page 72

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mcimx27-

Manufacturer Part Number
mcimx27-
Description
Multimedia Applications Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Signal Descriptions
3.6.9
Figure
ESDCTL module, which interfaces Mobile DDR or SDR SDRAM.
Table
72
OE/WE/IORD/IOWR
PSHT
PSST
PSL
41, and
Symbol
37,
CONTROL
Figure
CE1/CE2
HREADY
RWDATA
HADDR
SDRAM (DDR and SDR) Memory Controller
HRESP
RD/WR
A[25:0]
D[15:0]
HCLK
WAIT
Table 42
REG
POE
PCMCIA strobe hold time
PCMCIA strobe set up time
PCMCIA strobe length
38,
Figure
Figure 36. Read Accesses Timing Diagram—PSHT=1, PSST=1
list the timing parameters.
Table 36. PCMCIA Write and Read Timing Parameters
39,
Parameter
Figure
Preliminary—Subject to Change Without Notice
CONTROL 1
i.MX27 and i.MX27L Data Sheet, Rev. 1.2
ADDR 1
40,
Figure
41, and
PSST
ADDR 1
OKAY
REG
Figure 42
Min
0
1
1
OKAY
Table
depict the timings pertaining to the
PSL
37,
DATA read 1
Table
Max
128
OKAY
63
63
38,
Freescale Semiconductor
Table
PSHT
39,
clock
clock
clock
Unit
Table
40,

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