mcimx27- Freescale Semiconductor, Inc, mcimx27- Datasheet - Page 6

• Manufacturer Part Number: mcimx27-
• Description: Multimedia Applications Processor
• Manufacturer: Freescale Semiconductor, Inc

Functional Description and Application Information
6
Block Mnemonic
ESDRAMC
eMMA_lt
DMAC
GPIO
CSPI
CRM
GPT
FEC
CSI
EMI
I
2
C
Communication
Purpose Timer
CMOS Sensor
Direct Memory
Reset Module
Fast Ethernet
Interface (x3)
Block Name
Configurable
Purpose I/O
Peripheral
Enhanced
Controller
Controller
Controller
Clock and
eMMA_lt
Interface
Interface
External
Memory
SDRAM
General
General
Module
Inter IC
Access
Serial
Table 2. Digital and Analog Modules (continued)
Reset Control
Connectivity
Connectivity
Connectivity
Functional
Accelerator
Multimedia
Grouping
Peripheral
Peripheral
Peripheral
Peripheral
Clock and
Functions
Resource
Preliminary—Subject to Change Without Notice
Standard
Interface
Interface
Interface
External
Memory
Memory
System
i.MX27 and i.MX27L Data Sheet, Rev. 1.2
Timer
(EMI)
H/W
Pins
The CRM generates clock and reset signals used throughout
the i.MX27/MX27L processors and also for external
peripherals.
The CSI is a logic interface which enables the i.MX27/MX27L
processors to connect directly to external CMOS sensors and
a CCIR656 video source.
The i.MX27/MX27L processors have three CSPI modules.
CSPI is equipped with two data FIFOs and is a master/slave
configurable serial peripheral interface module, allowing the
i.MX27/MX27L processors to interface with both external SPI
master and slave devices.
The DMAC of the i.MX27/MX27L processors provides 16
channels supporting linear memory, 2D memory, FIFO and
end-of-burst enable FIFO transfers to support a wide variety of
DMA operations.
eMMA_lt consists of a PreProcessor and PostProcessor, and
provides video acceleration. The PrP and PP can be used for
generic video pre and post processing such as scaling,
resizing, and color space conversions.
The EMI includes
The ESDRAMC provides interface and control for synchronous
DRAM memories for the system.
The FEC performs the full set of IEEE 802.3/Ethernet
CSMA/CD media access control and channel interface
functions. The FEC supports connection and functionality for
the 10/100 Mbps 802.3 media independent interface (MII). It
requires an external transceiver (PHY) to complete the
interface to the media.
The GPIO provides 32 bits of bidirectional, general purpose
I/O. This peripheral provides dedicated general-purpose pins
that can be configured as either inputs or outputs.
The GPT is a multipurpose module used to measure intervals
or generate periodic output.
The I
and other external devices. Data rates of up to 100 Kbits/s are
supported.
• Multi-Master Memory Interface (M3IF)
• Enhanced SDRAM/MDDR memory controller (ESDRAMC)
• PCMCIA memory controller (PCMCIA)
• NAND Flash Controller (NFC)
• Wireless External Interface Module (WEIM)
2
C provides serial interface to control the sensor interface
Brief Description
Freescale Semiconductor
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