mcimx27- Freescale Semiconductor, Inc, mcimx27- Datasheet - Page 25

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mcimx27-

Manufacturer Part Number
mcimx27-
Description
Multimedia Applications Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
the Watchdog Control Register (WCR) when there is a detection of a clock monitor event, an external
reset, an external JTAG reset signal, or if a power-on-reset has occurred.
2.3.38
The Wireless External Interface Module (WEIM) handles the interface to devices external to the chip,
including generation of chip selects, clocks and controls for external peripherals and memory. It provides
asynchronous and synchronous access to devices with an SRAM-like interface.
The WEIM includes six chip selects for external devices, with two CS signals covering a range of
128 Mbytes, and the other four each covering a range of 32 Mbytes. The 128-Mbyte range can be
increased to 256 Mbytes when combined with the two signals. The WEIM offers selectable protection for
each chip select as well as programmable data port size. There is a programmable wait-state generator for
each chip select and support for Big Endian and Little Endian modes of operation per access.
2.3.39
The Video Codec module is the video processing module in the i.MX27 processor. It supports full duplex
video codec with 25 fps VGA resolution, supports multi-party calls, and integrates multiple video
processing standards, including H.264 BP, MPEG-4 SP, and H.263 P3 (including annex I, J, K, and T), D1
resolution, 30 fps—half-duplex.
It has three 64-bit AHB-Lite master bus interfaces connecting to the EMI, which includes two read
channels and one write channel. Its 32-bit AHB-Lite master bus is connected to ARM Platform to access
system-internal SRAM.
The Video Codec module contains three major architectural components: video codec processing IP,
AXI-to-AHB bus protocol transfer module, and a 32-bit to 64-bit AHB master bus protocol transfer
module.
The Video Codec module supports following video stream processing features:
Freescale Semiconductor
Multi-standard video codec
— MPEG-4 part-II simple profile encoding/decoding
— H.264/AVC baseline profile encoding/decoding
— H.263 P3 encoding/decoding
— Multi-party call: max processing four image/bitstream encoding and/or decoding
— Multi-format: for example, encodes MPEG-4 bitstream, and decodes H.264 bitstream
Coding tools
— High-performance motion estimation
simultaneously
simultaneously
– Single reference frame for both MPEG-4 and H.264 encoding
– Support 16 reference frame for H.264 decoding
Wireless External Interface Module (WEIM)
Video Codec
The Video Codec feature is not available on the i.MX27L
Preliminary—Subject to Change Without Notice
i.MX27 and i.MX27L Data Sheet, Rev. 1.2
NOTE
Functional Description and Application Information
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