mc9s12e256 Freescale Semiconductor, Inc, mc9s12e256 Datasheet - Page 200

• Manufacturer Part Number: mc9s12e256
• Description: Hcs12 Microcontrollers 16-bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Chapter 4 Clocks and Reset Generator (CRGV4)
4.6
The interrupts/reset vectors requested by the CRG are listed in
“MC9S12E256 Device Overview (MC9S12E256DGV1)”
4.6.1
The CRGV4 generates a real-time interrupt when the selected interrupt time period elapses. RTI interrupts
are locally disabled by setting the RTIE bit to 0. The real-time interrupt flag (RTIF) is set to 1 when a
timeout occurs, and is cleared to 0 by writing a 1 to the RTIF bit.
The RTI continues to run during pseudo-stop mode if the PRE bit is set to 1. This feature can be used for
periodic wakeup from pseudo-stop if the RTI interrupt is enabled.
4.6.2
The CRGV4 generates a PLL lock interrupt when the LOCK condition of the PLL has changed, either
from a locked state to an unlocked state or vice versa. Lock interrupts are locally disabled by setting the
LOCKIE bit to 0. The PLL Lock interrupt flag (LOCKIF) is set to1 when the LOCK condition has
changed, and is cleared to 0 by writing a 1 to the LOCKIF bit.
4.6.3
The CRGV4 generates a self-clock mode interrupt when the SCM condition of the system has changed,
either entered or exited self-clock mode. SCM conditions can only change if the self-clock mode enable
bit (SCME) is set to 1. SCM conditions are caused by a failing clock quality check after power-on reset
(POR) or low voltage reset (LVR) or recovery from full stop mode (PSTP = 0) or clock monitor failure.
For details on the clock quality check refer to
is enabled (CME = 1) a loss of external clock will also cause a SCM condition (SCME = 1).
SCM interrupts are locally disabled by setting the SCMIE bit to 0. The SCM interrupt flag (SCMIF) is set
to 1 when the SCM condition has changed, and is cleared to 0 by writing a 1 to the SCMIF bit.
200
Interrupts
Real-Time Interrupt
PLL Lock Interrupt
Self-Clock Mode Interrupt
Real-time interrupt
Interrupt Source
LOCK interrupt
SCM interrupt
Table 4-15. CRG Interrupt Vectors
MC9S12E256 Data Sheet, Rev. 1.08
Section 4.4.4, “Clock Quality
Mask
CCR
I bit
I bit
I bit
for related vector addresses and priorities.
CRGINT (LOCKIE)
CRGINT (SCMIE)
CRGINT (RTIE)
Local Enable
Table
4-15. Refer to
Checker.” If the clock monitor
Chapter 1,
Freescale Semiconductor