hyb18m1g16 Qimonda, hyb18m1g16 Datasheet - Page 47

• Manufacturer Part Number: hyb18m1g16
• Description: Drams For Mobile Applications 1-gbit X16 Ddr Mobile-ram Rohs Compliant
• Manufacturer: Qimonda

1) These parameters depend on the operating frequency; the number of clock cycles shown are calculated for a clock frequency of 133 MHz
2) The values apply for a burst length of 4 and a CAS latency of 3.
3) Both timing conditions need to be satisfied; if not equal, the larger value applies
2.4.12
Depending on system considerations, it might be desired to change the DDR Mobile-RAM’s clock frequency while the device
is powered up. The DDR Mobile-RAM supports a clock frequency change when the device is in:
• self refresh mode (see
• power-down mode (see
• clock stop mode (see
Once the clock runs stable at the new clock frequency, the timing conditions for exiting these states have to be met before
applying the next access command. It should be pointed out that a continuous frequency drift is not considered a stable clock
and therefore is not supported.
Rev.1.0, 2007-03
10242006-Y557-TZXW
Command
ACTIVE
READ (Auto-Precharge Disabled)
READ (Auto-Precharge Enabled)
WRITE (Auto-Precharge Disabled)
WRITE (Auto-Precharge Enabled)
PRECHARGE
AUTO REFRESH
MODE REGISTER SET
for -7.5.
Command
CKE
CK
CK
Clock Frequency Change
Figure
Stopped
Figure
Clock
Figure
39).
36);
38);
Clock
Stop
NOP
Exit
T0
Minimum Number of Required Clock Pulses per Access Command
Command
Valid
CMD
T1
Timing Condition
t
(BL / 2) + CL
[(BL / 2) + t
1 + (BL / 2) + t
1 + (BL / 2) + t
t
t
t
RCD
RP
RFC
MRD
Timing Condition
47
NOP
T2
RP
]; [(BL / 2) + CL]
WR
DAL
NOP
Tn
Clock
Enter
Stop
NOP
3
5
5
6
9
3
12
2
- 6
HY[B/E]18M1G16[0/1]BF
1-Gbit DDR Mobile-RAM
3
5
5
5
8
3
10
2
= Don't Care
- 7.5
FIGURE 39
t
t
t
t
t
t
t
t
CK
CK
CK
CK
CK
CK
CK
CK
TABLE 16
Unit
Clock Stop
Data Sheet
1)
1)2)
1)2)3)
1)2)
1)2)
1)
1)
Note