mt29f1gxxabb Micron Semiconductor Products, mt29f1gxxabb Datasheet - Page 33

• Manufacturer Part Number: mt29f1gxxabb
• Description: 1gb X8, X16 Nand Flash Memory
• Manufacturer: Micron Semiconductor Products

INTERNAL DATA MOVE Operations
READ FOR INTERNAL DATA MOVE 00h-35h
INTERNAL DATA MOVE 85h-10h
PDF: 09005aef81dc05df / Source: 09005aef821d5f08
1gb_nand_m48a__2.fm - Rev. E 1/08 EN
An internal data move requires two command sequences. Issue a READ for INTERNAL
DATA MOVE (00h-35h) command first, then the INTERNAL DATA MOVE (85h-10h)
command. Data moves are only supported within the die from which data is read.
This READ command is used in conjunction with the INTERNAL DATA MOVE (85h-10h)
command. First, 00h is written to the command register, then the internal source
address is written (4 cycles). After the address is input, the READ for INTERNAL DATA
MOVE (35h) command writes to the command register. This transfers a page from mem-
ory into the cache register. The written column addresses are ignored even though all 4
address cycles are required. The memory device is now ready to accept the INTERNAL
DATA MOVE (85h-10h) command.
After the READ for INTERNAL DATA MOVE command has been issued and R/B# goes
HIGH, the INTERNAL DATA MOVE command can be written to the command register.
This command transfers the data from the cache register to the data register and program-
ming of the new destination page begins. After the INTERNAL DATA MOVE command
and address sequence are written to the device, R/B# goes LOW while the internal con-
trol logic automatically programs the new page. The READ STATUS command and bit 6
of the status register can be used instead of the R/B# line to determine when the WRITE
is complete. Bit 0 of the status register indicates if the operation was successful.
The RANDOM DATA INPUT (85h) command can be used during the INTERNAL DATA
MOVE command sequence to modify a word or multiple words in the original data.
First, data is copied into the cache register using the 00h-35h command sequence; then
the RANDOM DATA INPUT (85h) command is written, along with the address of the
data to be modified next. New data is input on the external data balls. This copies the
new data into the cache register.
When 10h is written to the command register, the original data plus the modified data is
transferred to the data register, and programming of the new page is started. The RAN-
DOM DATA INPUT command can be issued as many times as necessary before starting
the programming sequence with 10h (see Figure 22 and Figure 23 on page 34 for details).
Because the INTERNAL DATA MOVE operation does not utilize external memory, ECC
cannot be used to check for errors before programming the data to a new page. This can
lead to a data error if the source page contains a bit error due to charge loss or charge
gain. If multiple INTERNAL DATA MOVE operations are performed, these bit errors may
accumulate without correction. For this reason, it is highly recommended that systems
utilizing the INTERNAL DATA MOVE operation use a robust ECC scheme that can cor-
rect two or more bits per sector.
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
1Gb: x8, x16 NAND Flash Memory
Command Definitions
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