sak-c868p-1rr Infineon Technologies Corporation, sak-c868p-1rr Datasheet - Page 232

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sak-c868p-1rr

Manufacturer Part Number
sak-c868p-1rr
Description
8 - Bit Cmos Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
9.1
Circuit connections for SPI and I2C EEPROM are shown in
9.1.1
The bootstrap loader accesses the serial EEPROM in a page of 32 bytes at a time. Take
the SPI EEPROM AT25640 for example. The size is 8K bytes, so the total number of
pages is 8K/32 = 256. The serial EEPROM may contain one or more transfer blocks of
data, each containing up to 256 pages, and a download process may involve more than
one transfer blocks. Each transfer block has an 8 byte header in the first page. The
remainder of the first page and the rest of the pages in the transfer block contains the
data. A transfer block has the following structure:
Table 9-1
Byte
0
1
2
3
4
User’s Manual
Bootstrap from Serial EEPROM
Data Format of Serial EEPROM
First Page of a Transfer Block
Description
Password
If the password is 0A5
from the EEPROM). Otherwise, it would enter Phase B (serial
communication with the host). This password would only be checked for
the first transfer block and would be ignored for the subsequent transfer
blocks
Page-count
This byte indicates the length of this transfer block. It ranged from 0 to
255.
Last
If Last is 00
downloaded. Otherwise, the current transfer block is not the last block
to be downloaded.
Download Address, high byte
The most significant byte of the start address of XRAM or SRAM where
the data of EEPROM should be downloaded.
determine whether the destination is XRAM or SRAM by comparing this
byte with 0FF
Download Address, low byte
The least significant byte of the start address of XRAM or SRAM where
the data of EEPROM should be downloaded.
H
, the current transfer block is the last transfer block to be
H
.
H
, the MCU would enter Phase A (downloading
9-2
Figure
The Bootstrap Loader
Noted that we can
9-2.
V 1.0, 2003-01
C868

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