sak-c868p-1rr Infineon Technologies Corporation, sak-c868p-1rr Datasheet - Page 196

• Manufacturer Part Number: sak-c868p-1rr
• Description: 8 - Bit Cmos Microcontroller
• Manufacturer: Infineon Technologies Corporation

Field
TF0
TF1
The timer 0 and timer 1 interrupts are generated by TF0 and TF1 in register TCON,
which are set by a rollover in their respective timer/counter registers. When a timer
interrupt is generated, the flag that generated it is cleared by the on-chip hardware when
the service routine is vectored to.
The external interrupts 0 and 1 (P1.5/CCPOS0/T2/INT0/AN0 ,P1.6/CCPOS1/T2EX/
INT1/AN1) can each be either level-activated or negative transition-activated, depending
on bits IT0 and IT1 in register TCON. The flags that actually generate these interrupts
are bits IE0 and lE1 in TCON. When an external interrupt is generated, the flag that
generated this interrupt is cleared by the hardware when the service routine is vectored
to, but only if the interrupt was transition-activated. lf the interrupt was level-activated,
then the requesting external source directly controls the request flag, rather than the on-
chip hardware.
IRCON0
External Interrupt Control Register 0
Field
EXINT2
User’s Manual
7
-
r
6
-
r
Bits
5
7
Bits
0
5
-
r
Typ Description
rwh Timer 0 overflow flag
rwh Timer 1 overflow flag
Typ Description
rwh Interrupt Request Flag for External Interrupt 2
Set by hardware on timer/counter 0 overflow.
Cleared by hardware when processor vectors to
interrupt routine.
Set by hardware on timer/counter 1 overflow.
Cleared by hardware when processor vectors to
interrupt routine.
0 : Interrupt request is not active, cleared by
software. (default)
1 : Interrupt request is active, set by hardware.
4
-
r
7-12
3
-
r
[Reset value: XXXXXX00
2
-
r
EXINT3
Interrupt System
rwh
1
V 1.0, 2003-01
EXINT2
rwh
C868
0
B
]