sak-c868p-1rr Infineon Technologies Corporation, sak-c868p-1rr Datasheet - Page 165

• Manufacturer Part Number: sak-c868p-1rr
• Description: 8 - Bit Cmos Microcontroller
• Manufacturer: Infineon Technologies Corporation

4.11
The conversion and sample times are programmed via the bit fields ADCTC and ADSTC
respectively of the register ADCON1. Bit field ADCTC (conversion time control) selects
the internal ADC clock - adc_clk. Bit field ADSTC (sample time control) selects the
sample time. The data in ADCTC and ADSTC can be modified while a conversion is in
progress, but will only be evaluated after the current conversion has completed. Thus
the change will only affect the subsequent conversion. The internal ADC clock, adc_clk
is derived from the peripheral clock f
The A/D conversion procedure is divided into four parts :
Synchronizing phase (t
Sample phase (t
Conversion phase (t
Write result phase (t
The total A/D conversion time is defined by t
periods, t
The sample time t
below lists the possible combinations.
ADCTC
000 (default) 32
001
010
011
100
101
110
111
User’s Manual
SYNC
t
adc_clk = f
ADCC
Conversion and Sample Time Control
, t
Clock
Divider
(TVC)
28
24
20
16
12
8
4
S
S
= 2/f
), used for sampling the analog input voltage.
S
,t
CO
is configured in periods of the selected internal ADC clock. The table
WR
CO
SYS
SYS
and t
SYNC
), used for the real A/D conversion (includes calibration).
), used for writing the conversion result to the ADDATH registers.
+ t
ADC Basic Clock
adc_clk
f
f
f
f
f
f
f
f
/ clock divider
SYS
SYS
SYS
SYS
SYS
SYS
SYS
SYS
WR
), delay before actual conversion commence.
S
+ 8/adc_clk
. T
/ 32
/ 28
/ 24
/ 20
/ 16
/ 12
/ 8
/ 4
ADCC
sys
is computed with the following formula:
according to :
4-121
ADCC
ADSTC
000 (default) 2
001
010
011
100
101
110
111
which is the sum of the four phase
On-Chip Peripheral Components
Sample Time t
(Periods of
adc_clk, STC)
4
6
8
10
12
14
16
V 1.0, 2003-01
S
C868