sak-c868p-1rr Infineon Technologies Corporation, sak-c868p-1rr Datasheet - Page 139
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sak-c868p-1rr
Manufacturer Part Number
sak-c868p-1rr
Description
8 - Bit Cmos Microcontroller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.SAK-C868P-1RR.pdf
(266 pages)
- Current page: 139 of 266
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Register T12MSEL contains control bits to select the capture/compare functionality of
the three channels of timer T12.
T12MSELL
T12 Capture/Compare Mode Select Register, Low Byte
Field
MSEL60,
MSEL61
Note: In the capture modes, all edges at the CC6x inputs are leading to the setting of the
User’s Manual
7
corresponding interrupt status flags in register IS. In order to monitor the selected
capture events at the CCPOSx inputs in the multi-input capture modes, the
CC6xST bits of the corresponding channel are set when detecting the selected
event. The interrupt status bits and the CC6xST bits have to be reset by SW.
6
Bits
[3:0],
[7:4]
MSEL61
rw
Type Description
rw
5
Capture/Compare Mode Selection
These bitfields select the operating mode of the three
timer T12 capture/compare channels. Each channel
(n=0, 1, 2) can be programmed individually either for
compare or capture operation according to:
0000 Compare outputs disabled, pins CC6n and
0001 Compare output on pin CC6n, pin COUT6n can
0010 Compare output on pin COUT6n, pin CC6n can
0011 Compare output on pins COUT6n and CC6n.
01XX Double-Register Capture modes,
1000 Hall Sensor mode, see
1001 Hysteresis-like mode, see
101X Multi-Input Capture modes, see
11XX Multi-Input Capture modes, see
4
COUT6n can be used for IO. No capture action.
be used for IO. No capture action.
be used for IO. No capture action.
see
In order to enable the hall edge detection, all
three MSEL6x have to be programmed to Hall
Sensor mode.
4-95
Table
3
4-4.
On-Chip Peripheral Components
2
MSEL60
Table
rw
Table
[Reset value: 00
4-5.
1
Table
Table
4-5.
V 1.0, 2003-01
4-6.
4-6.
C868
0
H
]
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