pga370 ETC-unknow, pga370 Datasheet - Page 36

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pga370

Manufacturer Part Number
pga370
Description
Mpu Pentium Iii 64-bit 0.18um 700mhz 370-pin Fcpga
Manufacturer
ETC-unknow
Datasheet
Pentium
2.11
36
Table 12. Processor AGTL+ Bus Specifications
Table 13. Processor AGTL Bus Specifications
®
III Processor for the PGA370 Socket at 500 MHz to 1.13 GHz
AGTL / AGTL+ System Bus Specifications
It is recommended that the AGTL+ bus be routed in a daisy-chain fashion with termination
resistors to V
traces and the V
impedance. The valid high and low levels are determined by the input buffers using a reference
voltage called V
Table 12
AGTL+ reference voltage (V
V
specified and held to a ±15% tolerance, and that the intrinsic trace capacitance for the AGTL+
signal group traces is known and well-controlled. For more details on the AGTL+ buffer
specification, see the Intel
Intel
NOTES:
NOTES:
1. Unless otherwise noted, all specifications in this table apply to Pentium III processors at all frequencies.
2. Pentium III processors for the PGA370 socket contain AGTL+ termination resistors on the processor die,
3. V
4. The value of the on-die R
5. V
1. Specifications in this table do not apply to Pentium III processors at all frequencies. Please refer to the
2. Pentium III processors for the PGA370 socket contain AGTL termination resistors on the processor die,
3. V
4. The value of the on-die R
5. V
6. For the Coppermine-T differential clock platform, the on-die RTT min should be 50 .
7. Coppermine-T UP platforms require a 56 resistor and Coppermine-T DP platforms require a 68
V
On-die R
V
V
On-die R
V
TT
TT
REF
TT
REF
Symbol
Symbol
except for the RESET# input.
processor system bus is idle (static condition). This is measured at the PGA370 socket pins on the bottom
side of the baseboard.
Section 7.0
chipset/processor combination.
V
Intel
AGTL specification.
except for the RESET# input.
is idle (static condition). This is measured at the PGA370 socket pins on the bottom side of the baseboard.
on-die R
Refer to the recommendation guidelines for the specific chipset/processor combination.
V
Tolerance for the on-die R
TT
REF
REF
TT
REF
REF
®
for the processor and other AGTL+ logic. It is important that the baseboard impedance be
Pentium
®
must be held to 1.25 V ±9%. It is required that V
and Vcc
decoupling on the motherboard.
decoupling on the motherboard.
is generated on the motherboard and should be 2/3 V
is generated on the motherboard and should be 2/3 V
Pentium
TT
TT
below lists the nominal specification for the AGTL+ termination voltage (V
TT
has a resistance tolerance of ±15%. See
TT
Bus Termination Voltage
Termination Resistor
Bus Reference Voltage
for more details on the RTTCTRL signal. Refer to the recommendation guidelines for the specific
Bus Termination Voltage
Termination Resistor
Bus Reference Voltage
1.5
®
. These termination resistors are placed electrically between the ends of the signal
®
TT
REF
must be held to 1.5 V ±9%. It is required that V
II Processor AGTL+ Guidelines.
III Processor Specification Update for a complete listing on the processors that support the
voltage supply and generally are chosen to approximate the system platform
. Refer to the appropriate platform design guide for more information
Parameter
Parameter
TT
TT
TT
®
is determined by the resistor value measured by the RTTCTRL signal pin. See
is determined by the resistor value measured by the RTTCTRL signal pin. The
Pentium
is ±10% for 56
REF
) is generated on the system motherboard and should be set to 2/3
®
2/3 V
II Processor Developer's Manual and AP-585,
0.950
1.14
Min
Min
50
40
1, 2
TT
and 68 resistors and ±15% for 100
6
1, 2
- 2%
TT
Section 7.0
be held to 1.25 V ±3% while the processor system bus
2/3 V
2/3 V
56, 68
1.50
1.25
Typ
Typ
TT
TT
TT
TT
±2% nominally. Insure that there is adequate
±2% nominally. Insure that there is adequate
TT
for more details on the RTTCTRL signal.
and Vcc
2/3 V
1.308
Max
1.05
Max
130
115
TT
1.5
+ 2%
be held to 1.5 V ±3% while the
Units
Units
V
V
V
V
resistors
TT
). The
Datasheet
Notes
Notes
4, 7
3
4
5
3
5
resistor.

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