pga370 ETC-unknow, pga370 Datasheet - Page 21

• Manufacturer Part Number: pga370
• Description: Mpu Pentium Iii 64-bit 0.18um 700mhz 370-pin Fcpga
• Manufacturer: ETC-unknow

Datasheet
Table 2. Voltage Identification Definition
Note: VRM 8.5 specification uses five VID pin assignments VID[3:0, 25mV] and it is not compatible
NOTES:
Note that the ‘1111’ (all opens) ID can be used to detect the absence of a processor core in a given
socket as long as the power supply used does not affect these lines. Detection logic and pull-ups
should not affect VID inputs at the power source (see
The VID pins should be pulled up to a TTL-compatible level with external resistors to the power
source of the regulator only if required by the regulator or external logic monitoring the VID[3:0]
signals. The power source chosen must be guaranteed to be stable whenever the supply to the
voltage regulator is stable. This will prevent the possibility of the processor supply going above the
specified V
DC converter, this can be accomplished by using the input voltage to the converter for the VID line
pull-ups. A resistor of greater than or equal to 10 k may be used to connect the VID signals to the
converter input. Note that no changes have been made to the physical connector or pin definitions
between the Intel-enabled VRM 8.2 and VRM 8.4 specifications.
with VRM 8.4. Some Pentium III processors with CPUID 068xh are capable of supporting both
VRM 8.4 and VRM 8.5 specifications. Please refer to the Pentium III Specification Update for a
listing of processors that support both VRM specifications.
1. 0 = Processor pin connected to V
2. 1 = Open on processor; may be pulled up to TTL V
3. To ensure a system is ready for the Pentium III and Celeron processors, the values in BOLD in
be supported.
VID3
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
CC CORE
Pentium
VID2
in the event of a failure in the supply for the VID lines. In the case of a DC-to-
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
®
III Processor for the PGA370 Socket at 500 MHz to 1.13 GHz
SS
VID1
.
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1, 2
VID0
IH
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
on baseboard.
Section
7.0).
Vcc
No Core
1.80
1.85
1.90
1.95
2.00
2.05
1.60
1.65
1.70
1.75
1.30
1.35
1.40
1.45
1.50
1.55
CORE
3
3
3
3
3
3
3
3
3
3
Table 2
should
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