at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 96
at85c51snd3b
Manufacturer Part Number
at85c51snd3b
Description
Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet
1.AT85C51SND3B.pdf
(270 pages)
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AT85C51SND3B
Table 105. UDPADDH Register
UDPADDH (1.E4h) – USB Dual Port Ram Direct Access High Register
Reset Value = 0000 0000b
Table 106. UDPADDL Register
UDPADDL (1.E5h) – USB Dual Port Ram Direct Access High Register
Reset Value = 0000 0000b
Table 107. OTGCON Register
OTGCON (1.E6h) – USB OTG Control Register
Number
Number
Number
DPACC
6-3
2-0
7-0
Bit
Bit
Bit
7
7
7
7
0
7
6
DPADD10:8
Mnemonic Description
Mnemonic Description
Mnemonic Description
DPADD7:0
DPACC
Bit
Bit
Bit
6
6
6
0
-
-
-
-
DPRAM Direct Access Bit
Set this bit to directly read the content the Dual-Port RAM (DPR) data through
the UEDATX or UPDATX registers. See Section “Memory Access Capability” for
more details.
Clear this bit for normal operation and access the DPR through the endpoint
FIFO.
Reserved
The value read from these bits is always 0. Do not set these bits.
DPRAM Address High Bit
DPADD10:8 is the most significant part of DPADD. The least significant part is
provided by the UDPADDL register.
DPRAM Address Low Bit
DAPDD7:0 is the least significant part of DPADD. The most significant part is
provided by the UDPADDH register.
OTGCON pagination
This bit must be cleared to access the OTGCON register.
Reserved
The value read from these bits is always 0. Do not set these bits.
HNPREQ
5
5
5
-
SRPREQ
4
4
4
-
DPADD7:0
SRPSEL
3
3
3
-
VBUSHWC
2
2
2
DPADD10:8
VBUSREQ
1
1
1
7632C–MP3–11/06
VBUSRQC
0
0
0
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