at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 121
at85c51snd3b
Manufacturer Part Number
at85c51snd3b
Description
Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet
1.AT85C51SND3B.pdf
(270 pages)
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7632C–MP3–11/06
Reset Value = 0000 0000b
Table 124. UESTA0X Register
UESTA0X (1.CEh) – USB Endpoint Status 0 Register
Number
Number
CFGOK
6-4
3-2
Bit
Bit
7
1
0
7
7
6
5
4
Mnemonic Description
EPSIZE2:0
Mnemonic Description
ZLPSEEN
UNDERFI
EPBK1:0
OVERFI
OVERFI
CFGOK
ALLOC
Bit
Bit
6
-
-
Reserved
The value read from these bits is always 0. Do not set these bits.
Endpoint Size Bits
Set this bit according to the endpoint size:
000b: 8 bytes
001b: 16 bytes
010b: 32 bytes
011b: 64 bytes
Endpoint Bank Bits
Set this field according to the endpoint size:
00b: Single bank
01b: Double bank
1xb: Reserved. Do not use this configuration.
Endpoint Allocation Bit
Set this bit to allocate the endpoint memory.
Clear to free the endpoint memory.
See Section “Endpoint Activation” for more details.
Reserved
The value read from these bits is always 0. Do not set these bits.
Configuration Status Flag
Set by hardware when the endpoint X size parameter (EPSIZE) and the bank
parametrization (EPBK) are correct compared to the max FIFO capacity and the
max number of allowed bank. This bit is updated when the bit ALLOC is set.
If this bit is cleared, the user should reprogram the UECFG1X register with
correct EPSIZE and EPBK values.
Overflow Error Interrupt Flag
Set by hardware when an overflow error occurs in an isochronous endpoint. An
interrupt (EPINTx) is triggered (if enabled).
See Section “Isochronous Mode” for more details.
Shall be cleared by software. Setting by software has no effect.
Flow Error Interrupt Flag
Set by hardware when an underflow error occurs in an isochronous endpoint. An
interrupt (EPINTx) is triggered (if enabled).
See Section “Isochronous Mode” for more details.
Shall be cleared by software. Setting by software has no effect.
Zero Length Packet Seen (bit / Flag)
Set by hardware, as soon as a ZLP has been filtered during a transfer.
Shall be cleared by the software. Setting by software has no effect.
UNDERFI
5
ZLPSEEN
4
100b: 128 bytes
101b: 256 bytes
110b: 512 bytes
111b: Reserved. Do not use this configuration.
DTSEQ1
3
AT85C51SND3B
DTSEQ0
2
NBUSYBK1 NBUSYBK0
1
0
121
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