at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 69

no-image

at85c51snd3b

Manufacturer Part Number
at85c51snd3b
Description
Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
at85c51snd3b1-7FTUL
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
at85c51snd3b1-RTTUL
Manufacturer:
Atmel
Quantity:
10 000
Timer 0 Enhanced Mode
Timer 1
7632C–MP3–11/06
Timer 0 overflow period can be increased in all modes by enabling a divider as detailed
in Figure 40. This mode is implemented to allow higher time periods as it can be used
for example as a scheduler time base with auto-reload (mode 2).
Timer 0 enhanced mode is enabled by programming T0ETB2:0 bits in SCHCLK (see
Table 87) to a value other than 000b and according to Table 79.
Figure 40. Timer/Counter 0 Enhanced Mode
Table 79. Timer/counter 0 Enhanced Overflow Period
Timer 1 is identical to Timer 0 except for Mode 3 which is a hold-count mode and for the
enhanced mode which is not available. The following comments help to understand the
differences:
Timer 1 functions as either a Timer or event Counter in three modes of operation.
Figure 32, Figure 34, and Figure 36 show the logical configuration for modes 0, 1,
and 2. Timer 1’s mode 3 is a hold-count mode.
Timer 1 is controlled by the four high-order bits of TMOD register (see Table 82) and
bits 2, 3, 6 and 7 of TCON register (see Table 81). TMOD register selects the
method of Timer gating (GATE1), Timer or Counter operation (C/T1#) and mode of
operation (M11 and M01) according to Table 80. TCON register provides Timer 1
control functions: overflow flag (TF1), run control bit (TR1), interrupt flag (IE1) and
interrupt type control bit (IT1).
Timer 1 can serve as the Baud Rate Generator for the Serial Port. Mode 2 is best
suited for this purpose.
For normal Timer operation (GATE1 = 0), setting TR1 allows TL1 to be incremented
by the selected input. Setting GATE1 and TR1 allows external pin INT1 to control
Timer operation.
Timer 1 overflow (count rolls over from all 1s to all 0s) sets the TF1 flag generating
an interrupt request.
When Timer 0 is in mode 3, it uses Timer 1’s overflow flag (TF1) and run control bit
(TR1). For this situation, use Timer 1 only for applications that do not require an
interrupt (such as a Baud Rate Generator for the Serial Port) and switch Timer 1 in
and out of mode 3 to turn it off and on.
Timer 0 Overflow
T0ETB2
0
0
0
0
1
1
1
1
T0ETB1
0
0
1
1
0
0
1
1
T0ETB2:0
SCHCLK.6:4
÷ 2
N
T0ETB0
0
1
0
1
0
1
0
1
TF0
New TF0 Overflow Period
PER
TCON.5
TF0
TF0
TF0
TF0
÷ 1 (divider disable)
TF0
TF0
TF0
TF0
PER
AT85C51SND3B
PER
PER
PER
PER
PER
PER
÷ 128
÷ 16
÷ 32
÷ 64
÷ 2
÷ 4
÷ 8
Timer 0
Interrupt
Request
69

Related parts for at85c51snd3b