at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 238

• Manufacturer Part Number: at85c51snd3b
• Description: Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
• Manufacturer: ATMEL Corporation

238
AT85C51SND3B
Reset Value= 0000 0000b
Table 258. LCDSTA Register
LCDSTA (1.8Fh) – LCD Status Register
Reset Value= 0000 0000b
Table 259. LCDBUM Register
LCDBUM (1.8Dh) – LCD Busy Mask Register
Reset Value= 0000 0000b
Number
Number
Number
BUM7
7:1
7:0
Bit
Bit
Bit
3
2
1
0
7
0
7
-
Mnemonic Description
Mnemonic Description
Mnemonic Description
LCBUSY
BUM7:0
LCYCT
BUM6
LCEN
LCRD
LCRS
Bit
Bit
Bit
6
6
-
-
Cycle Type Selection
Set to select non normalized access cycles (6800 or 8080 interface).
Clear to select normalized access cycles (6800 or 8080 interface).
LCD Interface Enable
Set to enable the LCD Interface.
Clear to disable the LCD Interface.
LCD Read Command
Set to initiate a read data or status register from LCD controller.
Cleared by hardware at the end of read.
LCD Register Select
Set to output high level on LA0/LRS pin during next read or write access.
Clear to output low level on LA0/LRS pin during next read or write access.
This value depends on the LCD controller.
Reserved
The value read from these bits is always 0. Do not set these bits.
Busy Flag
Set by hardware during any access to the LCD controller and while LCD
controller is busy if busy check process is enabled.
Busy Mask
Set bits to be checked during the busy check process and thus enable the busy
check process.
Clear all bits to disable the busy check process.
BUM5
5
5
-
BUM4
4
4
-
BUM3
3
3
-
BUM2
2
2
-
BUM1
1
1
-
7632C–MP3–11/06
LCBUSY
BUM0
0
0