at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 68

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at85c51snd3b

Manufacturer Part Number
at85c51snd3b
Description
Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet

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Mode 3 (2 x 8-bit Timers)
68
AT85C51SND3B
Figure 36. Timer/Counter x (x = 0 or 1) in Mode 2
Figure 37. Mode 2 Auto-reload Period Formula
Mode 3 configures Timer 0 such that registers TL0 and TH0 operate as separate 8-bit
Timers (see Figure 38). This mode is provided for applications requiring an additional 8-
bit Timer or Counter. TL0 uses the Timer 0 control bits C/T0# and GATE0 in TMOD reg-
ister, and TR0 and TF0 in TCON register in the normal manner. TH0 is locked into a
Timer function (counting F
run control (TR1) bits. Thus, operation of Timer 1 is restricted when Timer 0 is in mode
3. Figure 39 gives the auto-reload period calculation formulas for both TF0 and TF1
flags.
Figure 38. Timer/Counter 0 in Mode 3: 2 8-bit Counters
Figure 39. Mode 3 Overflow Period Formula
INTx
INTx
CLOCK
CLOCK
CLOCK
TIMx
TIM0
TIM0
Tx
Tx
TMOD Reg
TCON Reg
GATEx
GATE0
TMOD.3
TCON.4
TR0
TRx
÷ 6
÷ 6
÷ 6
TF0
PER
=
TMOD Reg
TMOD.2
C/Tx#
C/T0#
6
0
1
0
1
(256 – TL0)
F
TF1
TIM0
/6) and takes over use of the Timer 1 interrupt (TF1) and
TFx
TCON.6
TR1
PER
=
6
(8 bits)
(8 bits)
(256 – THx)
THx
TLx
F
(8 bits)
(8 bits)
TIMx
TH0
TL0
TF1
Overflow
PER
Overflow
Overflow
=
6
(256 – TH0)
F
TIM0
TCON reg
TCON.5
TCON.7
TFx
TF0
TF1
7632C–MP3–11/06
Timer x
Interrupt
Request
Timer 0
Interrupt
Request
Timer 1
Interrupt
Request

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