at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 185

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at85c51snd3b

Manufacturer Part Number
at85c51snd3b
Description
Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
Manufacturer
ATMEL Corporation
Datasheet

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Registers
7632C–MP3–11/06
As soon as an enabled interrupt is triggered, the NFC becomes not running
(NFRUN= 0).
Table 203. NFCFG Register
NFCFG (1.99h) – Nand Flash Controller Configuration Register
Reset Value = 0000 0000b
Table 204. NFLOG Register
NFLOG (1.9Ah) – Nand Flash Controller Logical Block Address Register
Reset Value = 0000 0000b
Number
NFLAD7
Number
NFGD7
or illegal operation (ILGLI)
7-0
7-0
Bit
Bit
7
7
Attempt to access a NF device which is not declared (e.g. DEV= 4 while
NUMDEV= 2)
Write of events (NFDATF, NFDAT, NFCMD, NFADC, NFADR) while NFC is
running (NFRUN= 1).
Note that writing in NFACT while NFC is running (RUN=1) does not lead to
an ILGLI interrupt.
Mnemonic Description
Mnemonic Description
NFLAD7:0
NFGD7:0
NFLAD6
NFGD6
Bit
Bit
6
6
Nand Flash Configuration 8-byte Data FIFO
Read Mode
Reading from this register resets the FIFO manager.
Write Mode
Write 8 bytes of data to update the NFC configuration registers according to
Table 189.
Nand Flash Logical Address 2-byte Data FIFO
Read Mode
Reading from this register resets the FIFO manager logical block address.
Write Mode
Write 2 bytes of data (MSB first) to update the NFC logical block address
according to Table 198.
NFLAD5
NFGD5
5
5
NFLAD4
NFGD4
4
4
NFLAD3
NFGD3
3
3
AT85C51SND3B
NFLAD2
NFGD2
2
2
NFLAD1
NFGD1
1
1
NFLAD0
NFGD0
0
0
185

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