at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 13

• Manufacturer Part Number: at85c51snd3b
• Description: Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
• Manufacturer: ATMEL Corporation

Parallel Slave Interface
Serial Interfaces
7632C–MP3–11/06
Table 10. PSI Signal Description
Table 11. SPI Controller Signal Description
Table 12. SIO Signal Description
AVDD2
AVSS2
Signal
Signal
Signal
Signal
Name
Name
SD7:0
Name
Name
MISO
MOSI
SWR
SRD
SCS
SCK
RXD
SA0
SS
Type Description
PWR
Type Description
Type Description
Type Description
GND
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
Analog Power Supply 2
Low Voltage system: connect this pin to LVDD pin.
High voltage system: connect this pin to external +3V power supply.
Analog Ground 2
Low Voltage system: connect this pin to LVSS pin.
High voltage system: connect this pin to external +3V ground.
Slave Data Bus
8-bit bidirectional data bus.
Slave Read Signal
Read signal asserted low during external host read operation.
Slave Write Signal
Write signal asserted low during external host write operation.
Slave Chip Select
Select signal asserted low during external host read or write operation.
Slave Address Bit 0
Address signal asserted during external host read or write operation.
SPI Master Input Slave Output Data Line
When in master mode, MISO receives data from the slave peripheral.
When in slave mode, MISO outputs data to the master controller.
SPI Master Output Slave Input Data Line
When in master mode, MOSI outputs data to the slave peripheral.
When in slave mode, MOSI receives data from the master controller.
SPI Clock Line
When in master mode, SCK outputs clock to the slave peripheral.
When in slave mode, SCK receives clock from the master controller.
SPI Slave Select Line
When in controlled slave mode, SS enables the slave mode.
Receive Serial Data
RXD sends and receives data in serial I/O mode 0 and receives data in
serial I/O modes 1, 2 and 3.
AT85C51SND3B
LWR/LRW
Alternate
Function
Alternate
Function
LRD/LDE
Alternate
Function
Alternate
Function
LA0/LRS
P0.7:0
LD7:0
MISO
INT0
INT1
P5.0
P5.3
P5.1
P5.2
P3.0
RXD
P3.1
TXD
P3.2
RTS
P3.3
CTS
P3.0
LCS
-
-
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