at85c51snd3b ATMEL Corporation, at85c51snd3b Datasheet - Page 208

• Manufacturer Part Number: at85c51snd3b
• Description: Single-chip Digital Audio Decoder - Encoder With Usb 2.0 Interface
• Manufacturer: ATMEL Corporation

Parallel Slave
Interface
Description
PSI Addressing
208
AT85C51SND3B
The AT85C51SND3B derivatives implement a Parallel Slave Interface (PSI) allowing
parallel connection with a host for remote control and data transfer. By using this inter-
face, the AT85C51SND3B can be seen as a multimedia co-processor and be remotely
controlled by the host.
The main features of the PSI Interface are:
•
•
•
•
•
Figure 98 shows a typical PSI host connection. Interface consists in a 8-bit data bus, a
1-bit address bus and read and write signals along with a chip select.
Figure 98. Typical PSI Host Connection
The C51 core interfaces with the PSI using the following Special Function Registers:
PSICON (see Table 232) the control register, PSISTA (see Table 233) the status regis-
ter, PSIDAT (see Table 234) the data register and PSISTH (see Table 235) the host
status register.
The PSI is enabled by setting the PSEN bit in PSICON.
As soon as the PSI is enabled, I/O ports are programmed in input and I/O pull-ups are
disabled.
Figure 99. PSI Block Diagram
The AT85C51SND3B are accessible by a host in read or write at two different address
locations by setting or clearing the SA0 address signal. The data management is
Note:
CPU
DFC
ARM / I80 glueless interface capability
8-bit parallel data bus
1-bit address bus
16-byte FIFO with MCU interrupt capability
Bi-directional multimedia bus connection through one DFC Channel
Bus
Bus
CLOCK
PER
1. Optional signal for slave to host signaling.
HOST
16-byte FIFO
D7:0
INTx
CSx
WR
Manager
Manager
RD
A0
Control
Data
(1)
Controller
Interrupt
Interrupt
Request
PSI
SD7:0
SRD
SWR
SA0
SCS
Px.y
Decoder
AT85C51SND3B
Slave
7632C–MP3–11/06
SWR
SRD
SCS
SA0
SD7:0