isp1564 NXP Semiconductors, isp1564 Datasheet - Page 7

• Manufacturer Part Number: isp1564
• Description: Isp1564 Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 2.
ISP1564_1
Product data sheet
Symbol
C/BE[2]#
FRAME#
IRDY#
TRDY#
DEVSEL#
V
STOP#
CLKRUN#
REG(1V8)
PERR#
SERR#
GNDA
PAR
C/BE[1]#
GND
AD[15]
AD[14]
AD[13]
AD[12]
CC(IO)
[1]
Pin description
Pin
LQFP100 TFBGA100
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
F5
G5
H5
J5
H6
K5
G6
K6
J6
J7
J8
K7
K8
K9
H7
K10
J10
H10
H9
…continued
Type
I/O
I/O
I/O
I/O
I/O
-
I/O
I/O
-
I/O
O
-
I/O
I/O
-
I/O
I/O
I/O
I/O
[2]
Rev. 01 — 4 December 2006
Description
byte 2 of multiplexed PCI bus command and byte enable
PCI pad; 3.3 V signaling
PCI cycle frame; driven by the master to indicate the beginning and
duration of an access
PCI pad; 3.3 V signaling
PCI initiator ready; indicates the ability of the initiating agent to complete
the current data phase of a transaction
PCI pad; 3.3 V signaling
PCI target ready; indicates the ability of the target agent to complete the
current data phase of a transaction
PCI pad; 3.3 V signaling
PCI device select; indicates if any device is selected on the bus
PCI pad; 3.3 V signaling
I/O pads supply voltage; see
PCI stop; indicates that the current target is requesting the master to
stop the current transaction
PCI pad; 3.3 V signaling
PCI CLKRUN signal; pull down to ground through a 10 k resistor
PCI pad; 3.3 V signaling; open-drain
1.8 V regulator output voltage; only for voltage conditioning; cannot be
used to supply power to external components; see
PCI parity error; used to report data parity errors during all PCI
transactions, except a special cycle
PCI pad; 3.3 V signaling
PCI system error; used to report address parity errors and data parity
errors on the Special Cycle command, or any other system error in
which the result will be catastrophic
PCI pad; 3.3 V signaling; open-drain
analog ground
PCI parity
PCI pad; 3.3 V signaling
byte 1 of multiplexed PCI bus command and byte enable
PCI pad; 3.3 V signaling
ground
bit 15 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
bit 14 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
bit 13 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
bit 12 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
Section 7.8
HS USB PCI Host Controller
Section 7.8
© NXP B.V. 2006. All rights reserved.
ISP1564
7 of 99