isp1564 NXP Semiconductors, isp1564 Datasheet - Page 20

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isp1564

Manufacturer Part Number
isp1564
Description
Isp1564 Hi-speed Universal Serial Bus Pci Host Controller
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
Table 16.
Table 17.
Legend: * reset value
Table 18.
Legend: * reset value
ISP1564_1
Product data sheet
Bit
7
6 to 0
Bit
31 to 0
Bit
15 to 0
Symbol
MFD
HT[6:0]
Symbol
SVID[15:0]
Symbol
BAR0[31:0]
Header Type register (address 0Eh) bit description
BAR0 - Base Address register 0 (address 10h) bit description
SVID - Subsystem Vendor ID register (address 2Ch) bit description
8.2.1.10 Base Address register 0
8.2.1.11 Subsystem Vendor ID register
8.2.1.12 Subsystem ID register
Description
Multi-Function Device: This bit identifies a multifunction device.
0 — The device has a single function.
1 — The device has multiple functions.
Header Type: These bits identify the layout of the part of the predefined header, beginning at byte 10h
in configuration space.
Access Value
R
Power-up software must build a consistent address map before booting the machine to an
operating system. This means it must determine how much memory is in the system, and
how much address space the I/O controllers in the system require. After determining this
information, power-up software can map the I/O controllers into reasonable locations and
proceed with system boot. To do this mapping in a device-independent manner, base
registers for this mapping are placed in the predefined header portion of configuration
space.
Bit 0 in all Base Address registers is read-only and used to determine whether the register
maps into memory or I/O space. Base Address registers that map to memory space must
return logic 0 in bit 0. Base Address registers that map to I/O space must return logic 1 in
bit 0.
The bit description of the BAR0 register is given in
The Subsystem Vendor ID register is used to uniquely identify the expansion board or
subsystem where the PCI device resides. This register allows expansion board vendors to
distinguish their boards, even though the boards may have the same vendor ID and device
ID.
Subsystem vendor IDs are assigned by PCI-SIG to maintain uniqueness. The bit
description of the Subsystem Vendor ID register is given in
Subsystem ID values are vendor specific. The bit description of the Subsystem ID register
is given in
Access Value
R/W
1131h*
0000 0000h* Base Address to Memory-Mapped Host Controller Register Space:
Table
Description
Subsystem Vendor ID: 1131h is the subsystem vendor ID assigned to NXP
Semiconductors.
19.
Rev. 01 — 4 December 2006
Description
The memory size required by OHCI and EHCI are 4 kB and 256 bytes,
respectively. Therefore, BAR0[31:12] is assigned to the OHCI port, and
BAR0[31:8] is assigned to the EHCI port.
Table
17.
Table
HS USB PCI Host Controller
18.
© NXP B.V. 2006. All rights reserved.
ISP1564
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