isp1564 NXP Semiconductors, isp1564 Datasheet - Page 42

• Manufacturer Part Number: isp1564
• Description: Isp1564 Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 57.
Address: Content of the base address register + 10h
[1]
Table 58.
Address: Content of the base address register + 10h
ISP1564_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
31
30
29 to 7
6
5
4
3
The reserved bits must always be written with the reset value.
Symbol
MIE
OC
reserved
RHSC
FNO
UE
RD
HcInterruptEnable - Host Controller Interrupt Enable register bit allocation
HcInterruptEnable - Host Controller Interrupt Enable register bit description
reserved
R/W
R/W
R/W
R/W
MIE
31
23
15
0
0
0
7
0
[1]
Description
Master Interrupt Enable:
0 — Ignore
1 — Enables interrupt generation by events specified in other bits of this register.
Ownership Change:
0 — Ignore
1 — Enables interrupt generation because of ownership change.
-
Root Hub Status Change:
0 — Ignore
1 — Enables interrupt generation because of root hub status change.
Frame Number Overflow:
0 — Ignore
1 — Enables interrupt generation because of frame number overflow.
Unrecoverable Error:
0 — Ignore
1 — Enables interrupt generation because of unrecoverable error.
Resume Detect:
0 — Ignore
1 — Enables interrupt generation because of resume detect.
RHSC
R/W
R/W
R/W
R/W
OC
30
22
14
0
0
0
6
0
FNO
R/W
R/W
R/W
R/W
29
21
13
0
0
0
5
0
Rev. 01 — 4 December 2006
R/W
R/W
R/W
R/W
UE
28
20
12
0
0
0
4
0
reserved
reserved
[1]
[1]
R/W
R/W
R/W
R/W
RD
27
19
11
0
0
0
3
0
reserved
[1]
R/W
R/W
R/W
R/W
SF
26
18
10
0
0
0
2
0
HS USB PCI Host Controller
WDH
R/W
R/W
R/W
R/W
25
17
0
0
9
0
1
0
© NXP B.V. 2006. All rights reserved.
ISP1564
R/W
R/W
R/W
R/W
SO
24
16
0
0
8
0
0
0
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