isp1564 NXP Semiconductors, isp1564 Datasheet - Page 11

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isp1564

Manufacturer Part Number
isp1564
Description
Isp1564 Hi-speed Universal Serial Bus Pci Host Controller
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
ISP1564_1
Product data sheet
7.7 Power-On Reset (POR)
7.8 Power supply
Figure 4
start with 1. At t1, the detector passes through the trip level. Another delay will be added
before POR drops to 0 to ensure that the length of the generated detector pulse, POR, is
large enough to reset asynchronous flip-flops. If the dip is too short (t4 to t5 < 11 s),
POR will not react and will stay LOW.
Figure 5
Fig 4. Power-on reset
V
shows a possible curve of V
shows the ISP1564 power supply connection.
POR(trip)
t0
is typically 1.2 V.
t1
Rev. 01 — 4 December 2006
CC(IO)
t2
with dips at t2 to t3 and t4 to t5. At t0, POR will
t3
t4
HS USB PCI Host Controller
t5
004aaa922
© NXP B.V. 2006. All rights reserved.
V
V
POR
ISP1564
CC(IO)
POR(trip)
11 of 99

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