isp1564 NXP Semiconductors, isp1564 Datasheet - Page 64

• Manufacturer Part Number: isp1564
• Description: Isp1564 Hi-speed Universal Serial Bus Pci Host Controller
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 98.
Address: Content of the base address register + 08h
ISP1564_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
31 to 8
7 to 4
3 to 2
1
0
Symbol
reserved
IST[3:0]
reserved
PFLF
64AC
HCCPARAMS - Host Controller Capability Parameters register bit description
11.2.4 HCSP-PORTROUTE register
11.3.1 USBCMD register
11.3 Operational registers of enhanced USB Host Controller
R
7
0
Description
-
Isochronous Scheduling Threshold: Default = implementation dependent. This field indicates,
relative to the current position of the executing Host Controller, where software can reliably update
the isochronous schedule. When IST[3] is logic 0, the value of the least significant three bits
indicates the number of microframes a Host Controller can hold a set of isochronous data
structures, one or more, before flushing the state. When IST[3] is logic 1, the host software
assumes the Host Controller may cache an isochronous data structure for an entire frame.
-
Programmable Frame List Flag: Default = implementation dependent. If this bit is cleared, the
system software must use a frame list length of 1024 elements with the Host Controller. The
USBCMD register FLS[1:0] (bits 3 and 2) is read-only and must be cleared. If PFLF is set, the
system software can specify and use a smaller frame list, and configure the host through the FLS
bit. The frame list must always be aligned on a 4 kB page boundary to ensure that the frame list is
always physically contiguous.
64-bit Addressing Capability: This field contains the addressing range capability.
0 — Data structures using 32-bit address memory pointers.
1 — Data structures using 64-bit address memory pointers.
The HCSP-PORTROUTE (Companion Port Route Description) register is an optional
read-only field that is valid only if PRR (bit 7 in the HCSPARAMS register) is logic 1. Its
address is content of the base address register + 0Ch.
This field is a 15-element nibble array, each 4 bits is one array element. Each array
location corresponds one-to-one with a physical port provided by the Host Controller. For
example, PORTROUTE[0] corresponds to the first PORTSC port, PORTROUTE[1] to the
second PORTSC port, and so on. The value of each element indicates to which of the
companion Host Controllers this port is routed. Only the first N_PORTS elements have
valid information. A value of zero indicates that the port is routed to the lowest numbered
function companion Host Controller. A value of one indicates that the port is routed to the
next lowest numbered function companion Host Controller, and so on.
The USB Command (USBCMD) register indicates the command to be executed by the
serial Host Controller. Writing to this register causes a command to be executed.
shows the bit allocation.
R
6
0
IST[3:0]
R
5
0
Rev. 01 — 4 December 2006
R
4
1
R
3
0
reserved
R
2
0
HS USB PCI Host Controller
PFLF
R
1
1
© NXP B.V. 2006. All rights reserved.
ISP1564
64AC
Table 99
R
0
0
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