isp1564 NXP Semiconductors, isp1564 Datasheet - Page 5

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isp1564

Manufacturer Part Number
isp1564
Description
Isp1564 Hi-speed Universal Serial Bus Pci Host Controller
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
Table 2.
ISP1564_1
Product data sheet
Symbol
GNDA
AUX(1V8)
V
INTA#
RST#
SYS_TUNE
CLK
GNT#
REQ#
AD[31]
V
AD[30]
CC(AUX)
CC(IO)
[1]
Pin description
Pin
LQFP100 TFBGA100
1
2
3
4
5
6
7
8
9
10
11
12
6.2 Pin description
Fig 3. Pin configuration TFBGA100 (top view)
B1
C2
C1
D1
C3
C6
D2
D3
D4
E1
E2
E3
Type
-
-
-
O
I
I
I
I
O
I/O
-
I/O
[2]
Rev. 01 — 4 December 2006
Description
analog ground
1.8 V auxiliary output voltage; only for voltage conditioning; cannot be
used to supply power to external components; see
auxiliary supply voltage; see
PCI interrupt
PCI pad; 3.3 V signaling; open-drain
PCI reset; used to bring PCI-specific registers, sequencers and signals
to a consistent state
3.3 V input pad; CMOS
used for system tuning; always connect to ground; for details,
see
PCI system clock; see
PCI pad; 3.3 V signaling
PCI grant; indicates to the agent that access to the bus is granted
PCI pad; 3.3 V signaling
PCI request; indicates to the arbitrator that the agent wants to use the
bus
PCI pad; 3.3 V signaling
bit 31 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
I/O pads supply voltage; see
bit 30 of multiplexed PCI address and data
PCI pad; 3.3 V signaling
ball A1
index area
Section 11.4
G
C
D
H
A
B
E
F
K
J
1
2
3
Transparent top view
4
ISP1564ET
Table 128
5
6
Section 7.8
Section 7.8
7
8
004aaa815
9
HS USB PCI Host Controller
10
Section 7.8
© NXP B.V. 2006. All rights reserved.
ISP1564
5 of 99

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