mc68hc908mr32 Freescale Semiconductor, Inc, mc68hc908mr32 Datasheet - Page 99

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mc68hc908mr32

Manufacturer Part Number
mc68hc908mr32
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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9.4 LVI Status and Control Register
The LVI status register (LVISCR) flags V
LVIOUT — LVI Output Bit
TRPSEL — LVI Trip Select Bit
9.5 LVI Interrupts
The LVI module does not generate interrupt requests.
9.6 Wait Mode
The WAIT instruction puts the MCU in low power-consumption standby mode.
With the LVIPWR bit in the configuration register programmed to 1, the LVI module is active after a WAIT
instruction.
Freescale Semiconductor
This read-only flag becomes set when the V
CGMXCLK cycles. See
This bit selects the LVI trip point. Reset clears this bit.
1 = 5 percent tolerance. The trip point and recovery point are determined by V
0 = 10 percent tolerance. The trip point and recovery point are determined by V
respectively.
respectively.
Address:
Reset:
If LVIRST and LVIPWR are 0s, note that when changing the tolerance, LVI
reset will be generated if the supply voltage is below the trip point.
Read:
Write:
V
LVRX
V
DD
LVIOUT
< V
$FE0F
Figure 9-3. LVI Status and Control Register (LVISCR)
Bit 7
V
V
V
R
R
> V
0
At Level:
DD
DD
DD
DD
LVRX
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Table
< V
< V
< V
< V
= Reserved
LVRX
LVRX
LVRX
LVRX
+ V
R
6
0
0
9-1. Reset clears the LVIOUT bit.
LVHX
+ V
Table 9-1. LVIOUT Bit Indication
LVHX
TRPSEL
DD
5
0
V
For Number of CGMXCLK Cycles:
Between 32 & 40 CGMXCLK cycles
voltages below the V
DD
DD
< 32 CGMXCLK cycles
> 40 CGMXCLK cycles
NOTE
R
voltage falls below the V
4
0
0
Any
Any
R
3
0
0
LVRX
R
2
0
0
level
LVRX
.
Previous value
LVI Status and Control Register
R
1
0
0
LVIOUT
0 or 1
voltage for 32 to 40
0
0
1
LVR1
Bit 0
LVR2
R
0
0
and V
and V
LVH1
LVH2
,
,
99

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