mc68hc908mr32 Freescale Semiconductor, Inc, mc68hc908mr32 Datasheet - Page 229

• Manufacturer Part Number: mc68hc908mr32
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

CHxF — Channel x Flag Bit
CHxIE — Channel x Interrupt Enable Bit
Freescale Semiconductor
When channel x is an input capture channel, this read/write bit is set when an active edge occurs on
the channel x pin. When channel x is an output compare channel, CHxF is set when the value in the
TIMA counter registers matches the value in the TIMA channel x registers.
When CHxIE = 1, clear CHxF by reading TIMA channel x status and control register with CHxF set,
and then writing a 0 to CHxF. If another interrupt request occurs before the clearing sequence is
complete, then writing 0 to CHxF has no effect. Therefore, an interrupt request cannot be lost due to
inadvertent clearing of CHxF.
Reset clears the CHxF bit. Writing a 1 to CHxF has no effect.
This read/write bit enables TIMA CPU interrupts on channel x.
Reset clears the CHxIE bit.
1 = Input capture or output compare on channel x
0 = No input capture or output compare on channel x
1 = Channel x CPU interrupt requests enabled
0 = Channel x CPU interrupt requests disabled
Register Name and Address:
Register Name and Address:
Register Name and Address:
Register Name and Address:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
CH0F
CH1F
CH2F
CH3F
Bit 7
Bit 7
Bit 7
Bit 7
R
0
0
0
0
0
0
0
0
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
= Reserved
and Control Registers (TASC0–TASC3)
CH0IE
CH1IE
CH2IE
CH3IE
6
0
6
0
6
0
6
0
Figure 16-8. TIMA Channel Status
TASC0 — $0013
TASC1 — $0016
TASC2 — $0019
TASC3 — $001C
MS0B
MS2B
R
R
5
0
5
0
0
5
0
5
0
0
MS0A
MS1A
MS2A
MS3A
4
0
4
0
4
0
4
0
ELS0B
ELS1B
ELS2B
ELS3B
3
0
3
0
3
0
3
0
ELS0A
ELS1A
ELS2A
ELS3A
2
0
2
0
2
0
2
0
TOV0
TOV1
TOV2
TOV3
1
0
1
0
1
0
1
0
CH0MAX
CH1MAX
CH2MAX
CH3MAX
Bit 0
Bit 0
Bit 0
Bit 0
0
0
0
0
I/O Registers
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