mc68hc908mr32 Freescale Semiconductor, Inc, mc68hc908mr32 Datasheet - Page 184

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mc68hc908mr32

Manufacturer Part Number
mc68hc908mr32
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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System Integration Module (SIM)
14.3.2 Active Resets from Internal Sources
All internal reset sources actively pull the RST pin low for 32 CGMXCLK cycles to allow resetting of
external peripherals. The internal reset signal (IRST) continues to be asserted for an additional 32 cycles
(see
LVI, or POR. (See
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals and other chips within a system
built around the MCU.
184
Figure
CGMOUT
14-5). An internal reset can be caused by an illegal address, illegal opcode, COP timeout,
RST
IAB
CGMXCLK
For LVI or POR resets, the SIM cycles through 4096 CGMXCLK cycles
during which the SIM forces the RST pin low. The internal reset signal then
follows the sequence from the falling edge of RST, as shown in
IRST
RST
IAB
Reset Type
Figure
All others
PC
POR/LVI
14-4.)
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
Figure 14-4. Sources of Internal Reset
RST PULLED LOW BY MCU
ILLEGAL ADDRESS RST
Figure 14-3. External Reset Timing
ILLEGAL OPCODE RST
Figure 14-5. Internal Reset Timing
Table 14-2. PIN Bit Set Timing
32 CYCLES
COPRST
POR
Number of Cycles Required to Set PIN
LVI
NOTE
4163 (4096 + 64 + 3)
67 (64 + 3)
INTERNAL RESET
32 CYCLES
VECT H
VECT L
VECTOR HIGH
Figure
Freescale Semiconductor
14-5.

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