mc68hc908mr32 Freescale Semiconductor, Inc, mc68hc908mr32 Datasheet - Page 49
mc68hc908mr32
Manufacturer Part Number
mc68hc908mr32
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908MR32.pdf
(282 pages)
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significant bits (LSB), located in the ADC data register low, ADRL, can be ignored. However, ADRL must
be read after ADRH or else the interlocking will prevent all new conversions from being stored.
Right justification will place only the two MSBs in the corresponding ADC data register high, ADRH, and
the eight LSBs in ADC data register low, ADRL. This mode of operation typically is used when a 10-bit
unsigned result is desired.
Left justified sign data mode is similar to left justified mode with one exception. The MSB of the 10-bit
result, AD9 located in ADRH, is complemented. This mode of operation is useful when a result,
represented as a signed magnitude from mid-scale, is needed. Finally, 8-bit truncation mode will place
the eight MSBs in ADC data register low, ADRL. The two LSBs are dropped. This mode of operation is
used when compatibility with 8-bit ADC designs are required. No interlocking between ADRH and ADRL
is present.
3.3.6 Monotonicity
The conversion process is monotonic and has no missing codes.
Freescale Semiconductor
Quantization error is affected when only the most significant eight bits are
used as a result. See
RESULT
003
002
001
000
8-BIT
RESULT
10-BIT
00B
00A
009
008
007
006
005
004
003
002
001
000
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
1/2
IDEAL 10-BIT CHARACTERISTIC
WITH QUANTIZATION = ±1/2
Figure 3-3. 8-Bit Truncation Mode Error
1 1/2
IDEAL 8-BIT CHARACTERISTIC
WITH QUANTIZATION = ±1/2
1/2
2 1/2
Figure
3 1/2
4 1/2
3-3.
5 1/2
1 1/2
NOTE
6 1/2
7 1/2
8 1/2
9 1/2
WHEN TRUNCATION IS USED,
ERROR FROM IDEAL 8-BIT = 3/8 LSB
DUE TO NON-IDEAL QUANTIZATION.
2 1/2
INPUT VOLTAGE
REPRESENTED AS 10-BIT
INPUT VOLTAGE
REPRESENTED AS 8-BIT
10-BIT TRUNCATED
TO 8-BIT RESULT
Functional Description
49
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