dsp56824 Freescale Semiconductor, Inc, dsp56824 Datasheet - Page 48

• Manufacturer Part Number: dsp56824
• Description: 16-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

3.13 JTAG Timing
(V
48
Note:
and T = 1/2 the clock cycle. For 70 MHz operation, T = 7.14 ns.
SS
No.
160
161
162
164
165
166
167
168
169
170
171
172
173
(Input)
= 0 V, V
TCK
Timing is both wait state and frequency dependent. In the formulas listed, WS = the number of wait states
V
M
= V
TCK frequency of operation
In OnCE Debug mode (EXTAL/8)
In JTAG mode
TCK cycle time
TCK clock pulse width
Boundary scan input data setup time
Boundary scan input data hold time
TCK low to output data valid
TCK low to output tri-state
TMS, TDI data setup time
TMS, TDI data hold time
TCK low to TDO data valid
TCK low to TDO tri-state
TRST assertion time
DE assertion time
DD
IL
= 2.7–3.6 V, T
+ (V
IH
– V
Figure 33. Test Clock Input Timing Diagram
IL
Freescale Semiconductor, Inc.
)/2
V
For More Information On This Product,
IH
A
Characteristics
= –40 to +85 C, C
Table 31. JTAG Timing
DSP56824 Technical Data
Go to: www.freescale.com
162
V
V
M
IL
L
= 50 pF)
161
162
V
34.5
Min
100
0.0
0.0
0.4
1.2
50
8T
—
—
—
—
50
M
0
70 MHz
Max
8.75
40.6
43.4
26.6
23.5
10
—
—
—
—
—
—
—
—
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AA1453