dsp56824 Freescale Semiconductor, Inc, dsp56824 Datasheet - Page 29

• Manufacturer Part Number: dsp56824
• Description: 16-bit Digital Signal Processor
• Manufacturer: Freescale Semiconductor, Inc

3.7 Port A External Bus Asynchronous Timing
(V
Note:
and T = 1/2 the clock cycle. For 70 MHz operation, T = 7.14 ns.
SS
No.
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
= 0 V, V
Timing is both wait state and frequency dependent. In the formulas listed, WS = the number of wait states
Address Valid to WR Asserted
WR Width Asserted
Wait states = 0
Wait states > 0
WR Asserted to D0–D15 Out Valid
Data Out Hold Time from WR Deasserted
Data Out Set Up Time to WR Deasserted
Wait states = 0
Wait states > 0
RD Deasserted to Address Not Valid
Address Valid to RD Deasserted
Input Data Hold to RD Deasserted
RD Assertion Width
Wait states = 0
Wait states > 0
Address Valid to Input Data Valid
Wait states = 0
Wait states > 0
Address Valid to RD Asserted
RD Asserted to Input Data Valid
Wait states = 0
Wait states > 0
WR Deasserted to RD Asserted
RD Deasserted to RD Asserted
WR Deasserted to WR Asserted
RD Deasserted to WR Asserted
DD
= 2.7–3.6 V, T
Table 25. External Bus Asynchronous Timing
Characteristic
Freescale Semiconductor, Inc.
For More Information On This Product,
A
= –40 to +85 C, C
DSP56824 Technical Data
Go to: www.freescale.com
L
= 50 pF)
Port A External Bus Asynchronous Timing
2T(WS) + 3T – 5.8
2T(WS + 1) – 6.4
T(2WS + 1) + 0.2
3T + 0.3
2T – 6.4
3T – 5.8
2T – 1.0
2T – 0.8
T + 0.2
T – 0.5
T – 5.6
T – 5.6
T – 0.9
T – 0.8
Min
2.6
0.0
—
—
—
—
—
2T(WS) + 3T –
2T(WS) + 3T –
3T – 5.4
3T – 4.7
T + 0.7
Max
5.4
4.7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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