dsp56824 Freescale Semiconductor, Inc, dsp56824 Datasheet - Page 30

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dsp56824

Manufacturer Part Number
dsp56824
Description
16-bit Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
3.8 Reset, Stop, Wait, Mode Select, and Interrupt
Timing
(V
30
Note: During Read-Modify-Write instructions and internal instructions, the address lines do not change state.
(See Note)
SS
No.
60
61
62
63
64
65
A0–A15,
D0–D15
PS, DS
= 0 V, V
WR
RD
RESET Assertion to Address, Data and Control Signals
High Impedance
Minimum RESET Assertion Duration
OMR Bit 6 = 0
OMR Bit 6 = 1
Asynchronous RESET Deassertion to First External
Address Output
Synchronous Reset Setup Time from RESET Deassertion
to CLKO Low
Synchronous Reset Delay Time from CLKO High to the
First External Access
Mode and XCOLF Select Setup Time
Table 26. Reset, Stop, Wait, Mode Select, and Interrupt Timing
DD
= 2.7–3.6 V, T
40
Figure 12. External Bus Asynchronous Timing
54
3
42
Freescale Semiconductor, Inc.
3
Characteristics
For More Information On This Product,
A
= –40 to +85 C, C
44
41
DSP56824 Technical Data
Go to: www.freescale.com
Data Out
2
50
L
52
= 50 pF)
43
49
46
48
524,329 + 38
67T + 4.5
66T + 2.5
Min
38T
4.6
3.8
0.3
Data In
T
1
51
70 MHz
53
55
67T + 12.3
66T + 7.5
Max
14.0
5.6
45
47
1
AA1451
Unit
ns
ns
ns
ns
ns
ns
ns

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