dsp56824 Freescale Semiconductor, Inc, dsp56824 Datasheet - Page 15

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dsp56824

Manufacturer Part Number
dsp56824
Description
16-bit Digital Signal Processor
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MISO1
PC4
MOSI1
PC5
SCK1
PC6
SS1
PC7
Signal
Name
Table 13. Serial Peripheral Interface (SPI0 and SPI1) Signals (Continued)
Input or
Input or
Input or
Input or
Signal
Output
Output
Output
Output
Output
Output
Output
Input/
Input/
Input/
Type
Input
During
Reset
State
Freescale Semiconductor, Inc.
Input
Input
Input
Input
For More Information On This Product,
SPI1 Master In/Slave Out—This serial data pin is an input to a master
device and an output from a slave device. The MISO1 line of a slave device
is placed in the high-impedance state if the slave device is not selected.
The driver on this pin can be configured as an open-drain driver by the
SPI’s WOM bit when this pin is configured for SPI operation. When using
Wired-OR mode, the user must provide an external pull-up device.
Port C GPIO 4 (PC4)—This pin is a GPIO pin called PC4 when the SPI
MISO1 function is not being used.
After reset, the default state is GPIO input.
SPI1 Master Out/Slave In (MOSI1)—This serial data pin is an output from
a master device and an input to a slave device. The master device places
data on the MOSI0 line a half-cycle before the clock edge that the slave
device uses to latch the data. The driver on this pin can be configured as an
open-drain driver by the SPI’s WOM bit when this pin is configured for SPI
operation. When using Wired-OR mode, the user must provide an external
pull-up device.
Port C GPIO5 (PC5)—This pin is a GPIO pin called PC5 when the SPI
MOSI1 function is not being used.
After reset, the default state is GPIO input.
SPI1 Serial Clock—This bidirectional pin provides a serial bit rate clock for
the SPI. This gated clock signal is an input to a slave device and is
generated as an output by a master device. Slave devices ignore the SCK
signal unless the slave select pin is active low. In both master and slave SPI
devices, data is shifted on one edge of the SCK signal and is sampled on
the opposite edge where data is stable. The driver on this pin can be
configured as an open-drain driver by the SPI’s WOM bit when this pin is
configured for SPI operation. When using Wired-OR mode, the user must
provide an external pull-up device.
Port C GPIO 6 (PC6)—This pin is a GPIO pin called PC6 when the SPI
SCK1 function is not being used.
After reset, the default state is GPIO input.
SPI1 Slave Select—This input pin is used to select a slave device before a
master device can exchange data with the slave device. SS must be low
before data transactions and must stay low for the duration of the
transaction. The SS line of the master must be held high.
Port C GPIO 7 (PC7)—This pin is a GPIO pin called PC7 when the SPI
SS1 function is not being used.
After reset, the default state is GPIO input.
DSP56824 Technical Data
Go to: www.freescale.com
Signal Description
Serial Peripheral Interface (SPI) Signals
15

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