adsp-21483 Analog Devices, Inc., adsp-21483 Datasheet - Page 50
adsp-21483
Manufacturer Part Number
adsp-21483
Description
Sharc Processor
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADSP-21483.pdf
(66 pages)
- Current page: 50 of 66
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ADSP-21483/21486/21487/21488/21489
Universal Asynchronous Receiver-Transmitter
(UART) Port—Receive and Transmit Timing
Figure 37
The maximum baud rate is PCLK/16 where PCLK = 1/tPCLK.
As shown in
Table 44. UART Port
1
Parameter
Timing Requirement
t
Switching Characteristic
t
UART signals RXD and TXD are routed through DPI P14-1 pins using the SRU.
RXD
TXD
1
1
describes UART port receive and transmit operations.
Figure 37
TRANSMIT
RECEIVE
Incoming Data Pulse Width
Outgoing Data Pulse Width
UART TRANSMIT
there is some latency between the gener-
UART RECEIVE
INTERRUPT
INTERRUPT
DPI_P14–1
INTERNAL
DPI_P14–1
INTERNAL
[RxD]
[TxD]
START
Figure 37. UART Port—Receive and Transmit Timing
Rev. PrA | Page 50 of 66 | March 2010
t
t
RXD
TXD
DATA (5–8)
DATA (5–8)
ation of internal UART interrupts and the external data
operations. These latencies are negligible at the data transmis-
sion rates for the UART.
STOP
STOP (1–2)
Min
16 × t
16 × t
UART TRANSMIT BIT SET BY PROGRAM;
UART RECEIVE BIT SET BY DATA STOP;
Preliminary Technical Data
CLEARED BY WRITE TO TRANSMIT
PCLK
PCLK
CLEARED BY FIFO READ
–1
–1
Max
Unit
ns
ns
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