adsp-21483 Analog Devices, Inc., adsp-21483 Datasheet - Page 28
adsp-21483
Manufacturer Part Number
adsp-21483
Description
Sharc Processor
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADSP-21483.pdf
(66 pages)
- Current page: 28 of 66
- Download datasheet (2Mb)
ADSP-21483/21486/21487/21488/21489
Precision Clock Generator (Direct Pin Routing)
This timing is only valid when the SRU is configured such that
the precision clock generator (PCG) takes its inputs directly
from the DAI pins (via pin buffers) and sends its outputs
directly to the DAI pins. For the other cases, where the PCG’s
Table 24. Precision Clock Generator (Direct Pin Routing)
1
Parameter
Timing Requirements
t
t
t
Switching Characteristics
t
t
t
t
D = FSxDIV, PH = FSxPHASE. For more information, see the ADSP-214xx SHARC Processor Hardware Reference, “Precision Clock Generators”
chapter.
Normal mode of operation.
PCGIW
STRIG
HTRIG
DPCGIO
DTRIGCLK
DTRIGFS
PCGOW
1
Input Clock Period
PCG Trigger Setup Before Falling Edge of PCG Input
Clock
PCG Trigger Hold After Falling Edge of PCG Input
Clock
PCG Output Clock and Frame Sync Active Edge
Delay After PCG Input Clock
PCG Output Clock Delay After PCG Trigger
PCG Frame Sync Delay After PCG Trigger
Output Clock Period
PCK_CLKx_O
PCG_TRIGx_I
PCG_EXTx_I
PCG_FSx_O
DAI_Pm
DPI_Pm
DAI_Pn
(CLKIN)
DPI_Pn
DAI_Py
DPI_Py
DAI_Pz
DPI_Pz
t
STRIG
Figure 16. Precision Clock Generator (Direct Pin Routing)
Rev. PrA | Page 28 of 66 | March 2010
t
DPCGIO
t
t
DTRIGCLK
HTRIG
t
DTRIGFS
Min
t
4.5
3
2.5
2.5 + (2.5 × t
2.5 + ((2.5 + D – PH) × t
2 × t
PCLK
t
× 4
DPCGIO
PCGIP
t
PCGIW
inputs and outputs are not directly routed to/from DAI pins (via
pin buffers) there is no timing data available. All timing param-
eters and switching characteristics apply to external DAI pins
(DAI_P01 – DAI_P20).
– 1
PCGIP
)
PCGIP
Preliminary Technical Data
)
t
PCGOW
Max
10
10 + (2.5 × t
10 + ((2.5 + D – PH) × t
PCGIP
)
PCGIP
)
Unit
ns
ns
ns
ns
ns
ns
ns
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