uda1355h-n2 NXP Semiconductors, uda1355h-n2 Datasheet - Page 68

• Manufacturer Part Number: uda1355h-n2
• Description: Stereo Audio Codec With Spdif Interface
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Notes
1. In order to prevent digital noise interfering with the L3-bus communication, the rise and fall times should be as small
2. When the sampling frequency is below 32 kHz, the L3CLOCK cycle must be limited to
3. C
4. After this period, the first clock pulse is generated.
5. To be suppressed by the input filter.
2003 Apr 10
handbook, full pagewidth
t
t
C
HD;DAT
SP
L
Stereo audio codec with SPDIF interface
as possible.
b
DATAO
is the total capacitance of one bus line in pF. The maximum capacitive load for each bus line is 400 pF.
DATAI
SYMBOL
BCK
WS
t r
data hold time
pulse width of spikes
load capacitance
t BCKH
T cy(BCK)
PARAMETER
t f
t BCKL
Fig.20 I
t h(WS)
t d(DATAO-WS)
note 5
for each bus line
2
S-bus interface timing.
68
CONDITIONS
t su(WS)
t h(DATAO)
t su(DATAI)
t d(DATAO-BCK)
0
0
MIN.
1
64fs
Preliminary specification
cycle.
TYP.
t h(DATAI)
UDA1355H
MGS756
50
400
MAX. UNIT
ns
pF
s