uda1355h-n2 NXP Semiconductors, uda1355h-n2 Datasheet - Page 29
uda1355h-n2
Manufacturer Part Number
uda1355h-n2
Description
Stereo Audio Codec With Spdif Interface
Manufacturer
NXP Semiconductors
Datasheet
1.UDA1355H-N2.pdf
(76 pages)
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Philips Semiconductors
2003 Apr 10
MODE
Stereo audio codec with SPDIF interface
10
11
6
7
8
9
See static mode
See static mode
See static mode
Data path:
Features:
Data path:
Features:
Not used
Inputs ADC and I
SPDIF
Input SPDIF to output I
Input SPDIF to output I
and WS being master; the clocks for
this are recovered from the SPDIF
input signal
The rest of the clocks are generated by
the crystal oscillator
SPDIF input channel status bits (two
times 40) can be read
SPDIF output channel status bits (two
times 40) setting
Possibility to process input SPDIF, via
I
then to outputs DAC or SPDIF.
Inputs ADC and SPDIF to outputs DAC
or I
Input I
BCK and WS are master
SPDIF input channel status bits (two
times 40) can be read
SPDIF output channel status bits (two
times 40) setting
Possibility to process inputs ADC or
SPDIF, via I
DSP and then to output SPDIF.
2
S-bus using an external DSP and
2
S
2
S to output SPDIF.
2
FEATURE
S-bus using an external
2
S to outputs DAC or
2
2
S.
S with BCK
29
ADC
ADC
XTAL
XTAL
I
SPDIF IN
I
2
SPDIF IN
2
S INPUT
S INPUT
(e.g. Sample Rate Convertor)
(e.g. Sample Rate Convertor)
I
I
2
2
S slave
S slave
EXTERNAL DSP
EXTERNAL DSP
SCHEMATIC
(SAA7715)
(SAA7715)
PLL
PLL
I
I
SPDIF OUT
SPDIF OUT
2
2
S OUTPUT
S OUTPUT
MGU849
MGU850
Preliminary specification
SPDIF LOCK
SPDIF LOCK
DAC
DAC
I
I
2
2
UDA1355H
S master
S master
MUTE
MUTE
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