uda1355h-n2 NXP Semiconductors, uda1355h-n2 Datasheet - Page 43

• Manufacturer Part Number: uda1355h-n2
• Description: Stereo Audio Codec With Spdif Interface
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 30 Description of register bits (address 01H)
Table 31 Register address 02H
Table 32 Description of register bits (address 02H)
2003 Apr 10
Symbol
Default
Symbol
Default
5 and 4 DIGOUT[1:0] Input selector for digital output. Value to select the input signal for the digital output. The
15 to 9
15 to 8
2 to 0
6 to 3
Stereo audio codec with SPDIF interface
BIT
BIT
BIT
BIT
8
7
6
3
7
MUTE_DAO
PON_DIGO
SFORO[2:0]
PON_DIGI
PON_DIGI
SYMBOL
SYMBOL
15
0
7
1
reserved
Digital mute setting. If this bit is logic 0, then the digital output is not muted; if this bit is
logic 1, then the digital output is muted.
Power control digital output. If this bit is logic 0, then the digital output is in Power-down
mode; if this bit is logic 1, then the digital output is in power-on mode. The registers have
their own clock, which means that there cannot be a dead-lock situation.
reserved
default input will be chosen if in an application an invalid data signal is selected:
reserved
Digital output format. Value to set the digital output format:
reserved
Power control digital input. If this bit is logic 0, then the digital input is in Power-down
mode; if this bit is logic 1, then the digital input is in power-on mode. The registers have their
own clock, which means that there cannot be a dead-lock situation.
reserved
00 = ADC input
01 = digital input
10 = IEC 60958 input
11 = interpolator mixer output
000 = I
001 = LSB-justified; 16 bits
010 = LSB-justified; 18 bits
011 = LSB-justified; 20 bits
100 = LSB-justified; 24 bits
101 = MSB-justified
110 = not used; output is default value
111 = not used; output is default value
14
0
6
0
2
S-bus
13
0
5
0
12
0
4
0
43
DESCRIPTION
DESCRIPTION
11
0
3
0
SFORI2
10
0
2
0
SFORI1
Preliminary specification
9
0
1
0
UDA1355H
SFORI0
8
0
0
0