uda1355h-n2 NXP Semiconductors, uda1355h-n2 Datasheet - Page 14

• Manufacturer Part Number: uda1355h-n2
• Description: Stereo Audio Codec With Spdif Interface
• Manufacturer: NXP Semiconductors

Philips Semiconductors
7.6
7.6.1
The analog input is equipped with a Programmable Gain
Amplifier (PGA) which can be controlled via the
microcontroller interface. The control range is from
0 to 24 dB gain in 3 dB steps independent for the left and
right channels.
In applications in with a 2 V (RMS) input signal, a 12 k
resistor must be used in series with the input of the ADC.
The 12 k resistor forms a voltage divider together with
the internal ADC resistor and ensures that the voltage,
applied to the input of the IC, never exceeds 1 V (RMS).
In the application for a 2 V (RMS) input signal, the PGA
must be set to 0 dB. When a 1 V (RMS) input signal is
applied to the ADC in the same application, the PGA gain
must be set to 6 dB.
An overview of the maximum input voltages allowed with
and without an external resistor and the PGA gain setting
is given in Table 5.
Table 5 Maximum input voltage; V
2003 Apr 10
handbook, full pagewidth
Present
Absent
Stereo audio codec with SPDIF interface
EXTERNAL
RESISTOR
(12 k )
Analog input
ADC
SPDIF0
SPDIF1
SPDIF2
SPDIF3
PGA GAIN
SETTING
SLICER_SEL [ 1:0 ]
0 dB
6 dB
0 dB
6 dB
23
24
25
26
SPDOUT_SEL1
SPDOUT_SEL0
select
SPDIF source
21, 22
DD
SLICER
Fig.6 Selection options for SPDIF output.
= 3 V
2 V (RMS)
1 V (RMS)
1 V (RMS)
0.5 V (RMS)
source
SPDIF
MAXIMUM
VOLTAGE
INPUT
DECODER
IEC 60958
UDA1355H
ENCODER
IEC 60958
14
7.6.2
The decimation from 64f
filter and decimation filter. The first stage realizes a
fourth-order
of eight. The second stage consists of three half-band
filters each decimating by a factor of two. Table 6 shows
the characteristics.
Table 6 Decimation filter characteristics
Note
1. The output is not 0 dB when V
In the ADC path there are left and right independent digital
volume controls with a range from +24 to 63.5 dB
and
linear mute that can be used to prevent plops when
powering-up or powering down the ADC front path.
Pass-band ripple
Stop band
Dynamic range
Overall gain from ADC
input to digital output
This is because the analog components can spread
over the process. When there is no external resistor,
the 1.16 dB scaling prevents clipping caused by
process mismatch.
SPDOUT_SEL2
MODE [ 2:0 ] SEL_STATIC
dB. This volume control is also used as a digital
D
ITEM
ECIMATION
17 to 19
MODE [ 3:0 ]
sin x
----------- -
x
characteristic with a decimation factor
20
s
is performed in two stages: comb
DC; V
CONDITIONS
5
0 to 0.45f
0 to 0.45f
>0.55f
note 1
SPDIF OUT
I
MGU833
= 0 dB;
Preliminary specification
I(rms)
s
s
s
UDA1355H
= 1 V at V
VALUE (dB)
140
0.02
1.16
DD
60
= 3 V.