uda1355h-n2 NXP Semiconductors, uda1355h-n2 Datasheet - Page 40
uda1355h-n2
Manufacturer Part Number
uda1355h-n2
Description
Stereo Audio Codec With Spdif Interface
Manufacturer
NXP Semiconductors
Datasheet
1.UDA1355H-N2.pdf
(76 pages)
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Philips Semiconductors
12.2
12.2.1
Table 25 Register address 00H
2003 Apr 10
5DH
5EH
5FH
SPDIF output
50H
51H
52H
53H
54H
55H
56H
60H
61H
62H
63H
64H
Device ID
7EH
Software reset
7FH
Symbol
Default
Symbol
Default
ADDRESS
Stereo audio codec with SPDIF interface
BIT
BIT
Read/write registers mapping
S
YSTEM SETTINGS
MODE3
EXPU
15
0
7
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
SPDIF input status bits 15 to 0 right channel read-out
SPDIF input status bits 31 to 16 right channel read-out
SPDIF input status bits 39 to 32 right channel read-out
SPDIF output valid; left to right channel status bit copy; power control and SPDIF output
selection setting
SPDIF output status bits 39 to 24 left channel setting
SPDIF output status bits 23 to 8 left channel setting
SPDIF output status bits 7 to 0 left channel setting
SPDIF output status bits 39 to 24 right channel setting
SPDIF output status bits 23 to 8 right channel setting
SPDIF output status bits 7 to 0 right channel setting
reserved for manufacturers evaluation and should be kept untouched for normal operation
reserved for manufacturers evaluation and should be kept untouched for normal operation
reserved for manufacturers evaluation and should be kept untouched for normal operation
reserved for manufacturers evaluation and should be kept untouched for normal operation
reserved for manufacturers evaluation and should be kept untouched for normal operation
device ID; version
restore L3-bus defaults
MODE2
14
0
6
0
PON_XTAL
MODE1
PLL
13
1
5
1
XTL_DIV4
MODE0
12
0
4
0
40
DESCRIPTION
ws_detct_EN ws_detct_set CLKOUT_
XTL_DIV3
11
1
3
1
XTL_DIV2
10
0
2
0
XTL_DIV1
Preliminary specification
SEL1
9
0
1
1
UDA1355H
XTL_DIV0
CLKOUT_
SEL0
8
0
0
0
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