idt49c465apqfb Integrated Device Technology, idt49c465apqfb Datasheet - Page 34

• Manufacturer Part Number: idt49c465apqfb
• Description: 32-bit Flow-thru Error Detection Correction Unit
• Manufacturer: Integrated Device Technology

IDT49C465/A
32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
AC TIMING DIAGRAMS — 64-BIT CONFIGURATION
NOTE:
1. Assumes that Memory Data and Checkbits are valid at least 4ns (Com.) before MLE goes HIGH.
MD
SD
MOE
U/L Slice
SOE
SYO
MLE
PLE
P
0–31
BE
0–31
CBI
64-BIT
0–3
N
(OUTPUT)
to
to
t SESZx
t BESZx
t MEMxZ
1
1
t BEPZx
t SEP
Valid DATA
t CMLS
t MMLS
Valid Checkbits In
t MLS
t PLS
t MLP
t PLP
t MSY
(1)
(1)
t MP
t CS
t MS
2
2
t MMLH
t CMLH
IN
Figure 13. 64-Bit Correct Timing (Upper Slice)
Partial Checkbits/ Syndrome Out
3
3
Corrected DATA
Parity Out
4
4
11.7
OUT
5
5
Parameter
t MEMxZ
t MMLS
t MMLH
t CMLS
t CMLH
t MLS
t PLS
t BESZx
t SESZx
t CS
t MS
t MSY
t MP
t MLP
t PLP
t BEPZx
t SEP
Name
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(1)
(1)
MOE = High to MD
Disabled
MD
MD
CBI Set-up to MLE = Low
CBI Hold to MLE = Low
MLE
PLE = Low to SD
BE
SOE = Low to SD
CBI to Corrected SD
MD
MD
MD
MLE = High to Parity Out
PLE = Low to Parity Out
BE
SOE = Low to Parity Out
N
N
From
IN
IN
IN
IN
IN
IN
= High to SD
= High to Parity Out
Set-up to MLE = Low
Hold to MLE = Low
to Corrected SD
to Corrected SD
to Parity Out
= High to SD
Propagation Delay
OUT
OUT
OUT
OUT
OUT
OUT
(1)
Enabled
OUT
OUT
Enabled
(1)
To
2552 drw 25
Min./
Max.
max.
min.
min.
min.
min.
max.
max.
max.
max.
max.
max.
max.
max.
max.
max.
max.
max.
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